公开(公告)号：US20140217950A1

公开(公告)日：2014-08-07

申请号：US14172627

申请日：2014-02-04

Applicant: Seiko Instruments Inc.

Inventor： Kotaro WATANABE ,  Makoto MITANI

IPC: H02M3/156 ,  H02P23/00

CPC classification number: H02P23/0095 ,  G04C10/00 ,  G04G19/06 ,  G05F1/613 ,  H02M2001/0006 ,  H02M2001/0035 ,  Y02B70/16

Abstract: There are provided a constant voltage circuit that outputs a stable constant voltage for an analog electronic clock, and an analog electronic clock featuring low current consumption and prolonged battery life. The constant voltage circuit has a first voltage holding circuit connected between the gate of an output transistor and an output terminal and a second voltage holding circuit connected between the gate of the output transistor and a ground terminal, and carries out control such that the second voltage holding circuit is enabled when the motor is operated.

Abstract translation: 提供了一个恒定电压电路，为模拟电子时钟输出稳定的恒定电压，以及具有低电流消耗和延长电池寿命的模拟电子时钟。 恒压电路具有连接在输出晶体管的栅极和输出端子之间的第一电压保持电路和连接在输出晶体管的栅极与接地端子之间的第二电压保持电路，并且进行控制，使得第二电压 保持电路在电机运行时使能。

公开(公告)号：US20140085996A1

公开(公告)日：2014-03-27

申请号：US14029251

申请日：2013-09-17

Applicant: Seiko Instruments Inc.

Inventor： Kotaro WATANABE ,  Makoto MITANI

IPC: G11C29/04

CPC classification number: G11C29/04 ,  G11C7/02 ,  G11C7/106 ,  G11C7/1063

Abstract: Provided is a readout circuit capable of detecting inversion of retained data caused by a noise, such as static electricity. The readout circuit is configured to retain opposing data in a first latch circuit and a second latch circuit in a readout period so as to be capable of detecting an anomaly of the retained data by making use of the fact that the data in the first latch circuit and the second latch circuit are inverted in the same direction due to a noise, such as static electricity.

Abstract translation: 提供一种能够检测由诸如静电之类的噪声引起的保留数据的反转的读出电路。 读出电路被配置为在读出期间将相对数据保存在第一锁存电路和第二锁存电路中，以便能够通过利用第一锁存电路中的数据来检测保留数据的异常 并且第二锁存电路由于诸如静电的噪声而在相同的方向上反转。

公开(公告)号：US20130249473A1

公开(公告)日：2013-09-26

申请号：US13784184

申请日：2013-03-04

Applicant: SEIKO INSTRUMENTS INC.

Inventor： Makoto MITANI ,  Kotaro WATANABE

IPC: H02J7/00

CPC classification number: H02J7/0031 ,  H02J2007/0037

Abstract: The semiconductor device includes the charging system including: electric power generating unit for supplying electric power; electric power storing unit for storing electric power generated by the electric power generating unit; switch unit provided in a charging path for charging the electric power storing unit with the electric power generated by the electric power generating unit; a comparator driven by the electric power generated by the electric power generating unit for comparing a reference voltage and a stored voltage of the electric power storing unit; and a level converter provided between the comparator and the switch unit for, based on a result of a comparison made by the comparator, converting a level of a generated voltage to a level of the stored voltage and outputting a resultant to the switch unit.

Abstract translation: 该半导体装置包括：充电系统，包括：用于供电的发电单元; 蓄电单元，用于存储由所述发电单元产生的电力; 开关单元，设置在充电路径中，用于利用所述发电单元产生的电力对所述蓄电单元进行充电; 由所述发电单元产生的用于比较所述电力存储单元的参考电压和存储电压的电力驱动的比较器; 以及电平转换器，其设置在所述比较器和所述开关单元之间，用于基于由所述比较器进行的比较的结果，将所产生的电压的电平转换为所存储的电压的电平，并将结果输出到所述开关单元。