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公开(公告)号：US20140204720A1
公开(公告)日：2014-07-24
申请号：US14161235
申请日：2014-01-22
Applicant: SEIKO INSTRUMENTS INC.
Inventor： Kotaro WATANABE , Makoto MITANI
Abstract: There are provided a constant voltage circuit that features low current consumption and stable operation, and an analog electronic clock provided with the constant voltage circuit. The constant voltage circuit includes a differential amplifier circuit which is turned on/off by a predetermined signal and which controls the voltage of a gate of an output transistor on the basis of a reference voltage and a feedback voltage that are received, a switch circuit which is connected to an output terminal of the differential amplifier circuit and which is turned on/off by a predetermined signal, and a voltage holding circuit which is connected between the gate of the output transistor and a power supply terminal and which has a resistor and a capacitor connected in series. An analog electronic clock provided with the foregoing constant voltage circuit that supplies a voltage to at least an oscillation circuit and a frequency division circuit.
Abstract translation: 提供了具有低电流消耗和稳定运行的恒压电路，以及配有恒压电路的模拟电子时钟。 恒压电路包括通过预定信号导通/截止的差分放大电路，并根据接收到的基准电压和反馈电压来控制输出晶体管的栅极的电压;开关电路， 连接到差分放大器电路的输出端并通过预定信号导通/截止;以及电压保持电路，连接在输出晶体管的栅极和电源端之间，并具有电阻和 电容串联连接。 具有上述恒压电路的模拟电子时钟，其向至少一个振荡电路和分频电路提供电压。
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公开(公告)号：US20130148444A1
公开(公告)日：2013-06-13
申请号：US13663952
申请日：2012-10-30
Applicant: Seiko Instruments Inc.
Inventor： Kotaro WATANABE , Makoto MITANI
IPC: G11C7/00
CPC classification number: G11C16/28
Abstract: There is disclosed a data reading device in which data of a nonvolatile storage element is reflected in a circuit to be regulated, with a minimum necessary delay width after turning a power on or after reset cancellation, and wrong writing due to a static electricity is prevented. A delay circuit is additionally disposed to output a delayed data reading signal after a signal of turning the power on or a signal of the reset cancellation is generated. A delay time T2 and a static electricity convergence time T1 are set so as to keep a relation of T1
Abstract translation: 公开了一种数据读取装置，其中非易失性存储元件的数据被反映在要调节的电路中，在打开电源或复位消除之后具有最小必需的延迟宽度，并且防止由静电引起的错误写入 。 另外设置延迟电路以在开启电源或产生复位消除的信号之后输出延迟的数据读取信号。 延迟时间T2和静电收敛时间T1被设定为保持T1
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公开(公告)号：US20160018788A1
公开(公告)日：2016-01-21
申请号：US14797416
申请日：2015-07-13
Applicant: Seiko Instruments Inc.
Inventor： Makoto MITANI , Kotaro WATANABE
IPC: G04F5/04
Abstract: To provide an analog electronic timepiece which prevents a crystal oscillation circuit from malfunctioning even if a battery voltage is lowered at motor loading. An analog electronic timepiece is equipped with a crystal vibrator, an oscillation circuit, a frequency division circuit, a constant voltage circuit, an output control circuit, and a motor. The analog electronic timepiece is configured in such a manner that the constant voltage circuit has a voltage holding circuit connected between a gate of an output transistor and a power supply terminal, and the oscillation circuit and the frequency division circuit are operated with a constant voltage generated by the constant voltage circuit as a power supply.
Abstract translation: 为了提供即使在电动机负载下电池电压降低的情况下也能防止晶体振荡电路发生故障的模拟电子钟表。 模拟电子钟表配备有晶体振子，振荡电路，分频电路，恒压电路，输出控制电路和电动机。 模拟电子钟表被配置成使得恒压电路具有连接在输出晶体管的栅极和电源端子之间的电压保持电路，并且以产生的恒定电压来操作振荡电路和分频电路 由恒压电路作为电源。
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公开(公告)号：US20140219037A1
公开(公告)日：2014-08-07
申请号：US14168759
申请日：2014-01-30
Applicant: Seiko Instruments Inc.
Inventor： Makoto MITANI , Kotaro WATANABE
CPC classification number: G11C29/028 , G11C7/1057 , G11C7/106 , G11C7/1066 , G11C7/222 , G11C29/021
Abstract: Provided is a semiconductor non-volatile memory device capable of improving the accuracy of trimming by creating a written state before data is written into a non-volatile memory element. The semiconductor non-volatile memory device includes: a written data transmission circuit for transmitting written data to a non-volatile memory element; a first switch connected between the non-volatile memory element and a data output terminal; a third switch connected to an output terminal of the written data transmission circuit; and a control circuit for controlling the respective switches. When a test mode signal is input, the control circuit turns on only the first switch and the third switch so as to control the written data to be output to the data output terminal before data is written into the non-volatile memory element.
Abstract translation: 提供一种半导体非易失性存储器件，其能够在将数据写入非易失性存储元件之前通过创建写入状态来提高修整精度。 半导体非易失性存储器件包括：写入数据传输电路，用于将写入的数据发送到非易失性存储器元件; 连接在所述非易失性存储元件与数据输出端子之间的第一开关; 连接到写入数据传输电路的输出端的第三开关; 以及用于控制各个开关的控制电路。 当输入测试模式信号时，控制电路仅打开第一开关和第三开关，以便在将数据写入非易失性存储元件之前控制写入数据输出到数据输出端。
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公开(公告)号：US20130250741A1
公开(公告)日：2013-09-26
申请号：US13785412
申请日：2013-03-05
Applicant: SEIKO INSTRUMENTS INC.
Inventor： Makoto MITANI , Kotaro WATANABE
IPC: G04G3/00
Abstract: The analog electronic watch includes: a crystal oscillator; an oscillator circuit; a frequency divider circuit; an output control circuit; a constant voltage circuit; and a cell. The constant voltage circuit and the output control circuit are powered from the cell. The oscillator circuit and the frequency divider circuit are powered from the constant voltage circuit. The constant voltage circuit is capable of outputting a first constant voltage and a second constant voltage in a switchable manner. The second constant voltage is a voltage which is equal to or lower than a cell voltage. The first constant voltage is a voltage which is smaller than the second constant voltage. The constant voltage is switched to the second constant voltage in a period of outputting the motor drive pulse.
Abstract translation: 模拟电子手表包括：晶振; 振荡电路; 分频器电路; 输出控制电路; 恒压电路; 和一个单元格。 恒压电路和输出控制电路由电池供电。 振荡电路和分频电路由恒压电路供电。 恒压电路能够以可切换的方式输出第一恒定电压和第二恒定电压。 第二恒定电压是等于或低于电池电压的电压。 第一恒定电压是小于第二恒定电压的电压。 在输出电动机驱动脉冲的期间，将恒定电压切换到第二恒定电压。
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Patent Agency Ranking
公开(公告)号：US20160071559A1
公开(公告)日：2016-03-10
申请号：US14844921
申请日：2015-09-03
Applicant: Seiko Instruments Inc.
Inventor： Makoto MITANI , Kotaro WATANABE
IPC: G11C7/10
Abstract: Provided is a data readout circuit capable of, even when a high voltage is applied during data read-out operation, preventing erroneous writing of the data and reading out the data correctly. The data readout circuit includes: a non-volatile storage element; a latch circuit including: an input inverter; an output inverter; and a MOS transistor; a first MOS transistor connected between the non-volatile storage element and the latch circuit; a second MOS transistor connected between the latch circuit and the first power supply terminal; a first bias circuit configured to bias a gate of the first MOS transistor; and a second bias circuit configured to bias the MOS transistor in the latch circuit, each of the first bias circuit and the second bias circuit being configured to output a predetermined bias voltage when the data in the non-volatile storage element is read out.
Abstract translation: 提供了一种数据读出电路，即使在数据读出操作期间施加高电压时，也能够防止数据的错误写入并正确地读出数据。 数据读出电路包括：非易失性存储元件; 锁存电路，包括：输入反相器; 输出变频器; 和MOS晶体管; 连接在非易失性存储元件和锁存电路之间的第一MOS晶体管; 连接在所述锁存电路和所述第一电源端子之间的第二MOS晶体管; 第一偏置电路，被配置为偏置所述第一MOS晶体管的栅极; 以及第二偏置电路，被配置为在所述锁存电路中偏置所述MOS晶体管，所述第一偏置电路和所述第二偏置电路中的每一个被配置为当所述非易失性存储元件中的数据被读出时输出预定的偏置电压。
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公开(公告)号：US20150260802A1
公开(公告)日：2015-09-17
申请号：US14656163
申请日：2015-03-12
Applicant: SEIKO INSTRUMENTS INC.
Inventor： Makoto MITANI , Kotaro WATANABE
IPC: G01R31/40 , G01R19/155
CPC classification number: G01R31/40 , G01R19/0084
Abstract: To provide a voltage detection circuit in which the influence on a detection voltage by semiconductor manufacturing variations is small and which is small in current consumption. A voltage detection circuit is provided which detects a voltage, based on an output signal of a detection circuit and outputs a detection signal. The detection circuit includes a first MOS transistor unit which allows a first current to flow, a second MOS transistor unit which allows a second current to flow, and a current voltage conversion unit which converts each of the first current and the second current into a voltage and outputs the same as the detection signal. A voltage characteristic of the first current and a voltage characteristic of the second current are configured so as to be crossed with each other at a predetermined voltage.
Abstract translation: 提供一种电压检测电路，其中通过半导体制造变化对检测电压的影响小并且电流消耗小。 提供一种电压检测电路，其基于检测电路的输出信号检测电压并输出检测信号。 检测电路包括允许第一电流流动的第一MOS晶体管单元，允许第二电流流动的第二MOS晶体管单元和将第一电流和第二电流中的每一个转换成电压的电流电压转换单元 并输出与检测信号相同的值。 第一电流的电压特性和第二电流的电压特性被构造成以预定电压彼此交叉。
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公开(公告)号：US20150162091A1
公开(公告)日：2015-06-11
申请号：US14551725
申请日：2014-11-24
Applicant: Seiko Instruments Inc.
Inventor： Kotaro WATANABE , Makoto MITANI
IPC: G11C16/28
CPC classification number: G11C16/28 , G11C16/225
Abstract: The present invention provides a data reading device capable of preventing erroneous writing during an operation of reading data from a non-volatile memory element. The data reading device includes a dummy reading circuit provided with a non-volatile memory element, the writing voltage of which is lower than that of a non-volatile memory element of a data reading circuit, and a state detection circuit that detects a written state of the non-volatile memory element of the dummy reading circuit. Upon detection of erroneous writing to the non-volatile memory element of the dummy reading circuit during a data reading operation, the data reading operation is immediately terminated.
Abstract translation: 本发明提供一种能够防止在从非易失性存储元件读取数据的操作期间错误写入的数据读取装置。 数据读取装置包括具有写入电压低于数据读取电路的非易失性存储元件的非易失性存储元件的虚拟读取电路，以及检测写入状态的状态检测电路 的虚拟读取电路的非易失性存储元件。 在数据读取操作期间检测到伪读取电路的非易失性存储元件的错误写入时，数据读取操作立即结束。
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公开(公告)号：US20140240054A1
公开(公告)日：2014-08-28
申请号：US14188379
申请日：2014-02-24
Applicant: Seiko Instruments Inc.
Inventor： Kotaro WATANABE , Makoto MITANI
IPC: H03K5/19
Abstract: Provided is an oscillation stop detection circuit having low current consumption, which is capable of detecting stop of oscillation regardless of whether an input signal stops at High or Low and thereby accurately measuring an oscillation stop detection period. The oscillation stop detection circuit includes: a pulse generation circuit for outputting a one-shot pulse in synchronization with an oscillation signal input from an input terminal; a capacitor including one terminal connected to a first power supply terminal and another terminal connected to an output terminal; a constant current circuit connected between the first power supply terminal and the another terminal of the capacitor; and a switch circuit connected between an output terminal of the pulse generation circuit and the another terminal of the capacitor, for connecting the another terminal of the capacitor to a second power supply terminal based on the one-shot pulse.
Abstract translation: 提供一种具有低电流消耗的振荡停止检测电路，无论输入信号是停止在高还是低，从而能够精确地测量振荡停止检测周期，其能够检测振荡停止。 振荡停止检测电路包括：脉冲发生电路，用于与从输入端子输入的振荡信号同步地输出单触发脉冲; 电容器，包括连接到第一电源端子的一个端子和连接到输出端子的另一个端子; 连接在所述第一电源端子和所述电容器的另一端子之间的恒流电路; 以及连接在所述脉冲发生电路的输出端子和所述电容器的另一端子之间的开关电路，用于基于所述单触发脉冲将所述电容器的另一端子连接到第二电源端子。
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公开(公告)号：US20160065132A1
公开(公告)日：2016-03-03
申请号：US14836625
申请日：2015-08-26
Applicant: Seiko Instruments Inc.
Inventor： Kotaro WATANABE , Makoto MITANI
CPC classification number: H03B5/364 , G04G3/00 , H03B5/30 , H03B5/32 , H03B5/366 , H03B2200/0062 , H03L5/00
Abstract: To provide a crystal oscillation circuit low in current consumption and stably short in oscillation start time. A crystal oscillation circuit is equipped with a crystal vibrator, a feedback resistor, a bias circuit, a constant voltage circuit, and an oscillation inverter configured by a constant current inverter. The oscillation inverter is configured so as to be controlled by currents based on input signals from the bias circuit and the crystal vibrator and driven by an output voltage of the constant voltage circuit.
Abstract translation: 提供消耗电流低，振荡开始时间短的晶体振荡电路。 晶体振荡电路配备有晶体振子，反馈电阻，偏置电路，恒压电路和由恒流逆变器构成的振荡反相器。 振荡反相器被配置为由基于来自偏置电路和晶体振子的输入信号的电流控制并由恒压电路的输出电压驱动。
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