公开(公告)号：US10345348B2

公开(公告)日：2019-07-09

申请号：US14838125

申请日：2015-08-27

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Massimiliano Gobbi ,  Ignazio Salvatore Bellomo ,  Domenico Tripodi ,  Antonio Borrello ,  Alberto Bianco

IPC: H02J7/00 ,  G01R19/165 ,  G01R19/04 ,  H02M1/32 ,  H02J7/34

Abstract: An active discharge circuit discharges an X capacitor and includes a sensor circuit that generates a sensor signal indicative of an AC voltage at the X capacitor. A processing unit generates a reset signal as a function of a comparison signal. A comparator circuit generates the comparison signal by comparing the sensor signal with a threshold. A timer circuit sets a discharge enable signal to a first logic level when the timer circuit is reset via a reset signal. The timer circuit determines the time elapsed since the last reset and tests whether the time elapsed exceeds a given timeout value. If the time elapsed exceeds the given timeout value, the timer circuit sets the discharge enable signal to a second logic level. A dynamic threshold generator circuit varies the threshold of the comparator circuit as a function of the sensor signal.

公开(公告)号：US12015406B2

公开(公告)日：2024-06-18

申请号：US18175359

申请日：2023-02-27

Applicant: STMICROELECTRONICS S.r.l.

Inventor： Domenico Tripodi ,  Luca Giussani ,  Simone Ludwig Dalla Stella

IPC: H03K3/017 ,  H03K5/04 ,  H03K5/05 ,  H03L7/08

CPC classification number: H03K3/017 ,  H03K5/04 ,  H03K5/05 ,  H03L7/08

Abstract: A PWM signal generator circuit includes a multiphase clock generator that generates a number n of phase-shifted clock phases having the same clock period and being phase shifted by a time corresponding to a fraction 1/n of the clock period. The PWM signal generator circuit determines for each switch-on duration first and second integer numbers, and for each switch-off duration third and fourth integer numbers. The first integer number is indicative of the integer number of clock periods of the switch-on duration and the second integer number is indicative of the integer number of the additional fractions 1/n of the clock period of the switch-on duration. The third integer number is indicative of the integer number of clock periods of the switch-off duration, and the fourth integer number is indicative of the integer number of the additional fractions 1/n of the clock period of the switch-off duration.

公开(公告)号：US20230129868A1

公开(公告)日：2023-04-27

申请号：US17507545

申请日：2021-10-21

Applicant: STMicroelectronics S.r.l.

Inventor： Domenico Tripodi

IPC: G06F1/04

Abstract: A system including an asynchronous finite state machine that transitions from a first state to a second state in response to receiving a virtual-clock event signal. The system further includes a trigger circuit that asserts a trigger signal when a first-state asynchronous event signal is asserted while the asynchronous finite state machine is in the first state. The system further including a virtual clock-pulse circuit configured to generate the virtual-clock event signal after receiving the trigger signal.

公开(公告)号：US11171632B2

公开(公告)日：2021-11-09

申请号：US17077833

申请日：2020-10-22

Applicant: STMicroelectronics S.r.l.

Inventor： Domenico Tripodi ,  Luca Giussani ,  Simone Ludwig Dalla Stella

IPC: H03K5/04 ,  H03K3/017 ,  H03K5/05 ,  H03L7/08

Abstract: A PWM signal generator circuit includes a multiphase clock generator that generates a number n of phase-shifted clock phases having the same clock period and being phase shifted by a time corresponding to a fraction 1/n of the clock period. The PWM signal generator circuit determines for each switch-on duration first and second integer numbers, and for each switch-off duration third and fourth integer numbers. The first integer number is indicative of the integer number of clock periods of the switch-on duration and the second integer number is indicative of the integer number of the additional fractions 1/n of the clock period of the switch-on duration. The third integer number is indicative of the integer number of clock periods of the switch-off duration, and the fourth integer number is indicative of the integer number of the additional fractions 1/n of the clock period of the switch-off duration.

公开(公告)号：US20160124029A1

公开(公告)日：2016-05-05

申请号：US14838125

申请日：2015-08-27

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Massimiliano Gobbi ,  Ignazio Salvatore Bellomo ,  Domenico Tripodi ,  Antonio Borrello ,  Alberto Bianco

IPC: G01R19/165 ,  H02J7/00 ,  G01R19/04

CPC classification number: G01R19/16557 ,  G01R19/04 ,  H02J7/0072 ,  H02J7/345 ,  H02M2001/322

Abstract: An active discharge circuit discharges an X. The detection circuit includes a sensor circuit that generates a sensor signal indicative of an AC oscillation voltage at the X capacitor. The detection circuit also includes a processing unit that generates the reset signal as a function of a comparison signal. A comparator circuit generates the comparison signal by comparing the sensor signal with a threshold. A timer circuit sets a discharge enable signal to a first logic level when the timer circuit is reset via a reset signal. The timer circuit determines the time elapsed since the last reset and tests whether the time elapsed exceeds a given timeout value. If the time elapsed exceeds the given timeout value, the timer circuit sets the discharge enable signal to a second logic level. A dynamic threshold generator circuit varies the threshold of the comparator circuit as a function of the sensor signal.

Abstract translation: 有源放电电路对X放电。检测电路包括传感器电路，其生成表示X电容器处的交流振荡电压的传感器信号。 检测电路还包括根据比较信号产生复位信号的处理单元。 比较器电路通过将传感器信号与阈值进行比较来生成比较信号。 当定时器电路通过复位信号复位时，定时器电路将放电使能信号设置为第一逻辑电平。 定时器电路确定自上次复位以来经过的时间，并测试经过的时间是否超过给定的超时值。 如果经过的时间超过给定的超时值，则定时器电路将放电使能信号设置为第二逻辑电平。 动态阈值发生器电路根据传感器信号改变比较器电路的阈值。

公开(公告)号：US20160103158A1

公开(公告)日：2016-04-14

申请号：US14510925

申请日：2014-10-09

Applicant: STMicroelectronics S.r.l.

Inventor： Mirko Gravati ,  Domenico Tripodi

IPC: G01R19/04

CPC classification number: G01R19/04

Abstract: A peak detector circuit receives an oscillating power supply signal. A capacitor is selectably coupled to the signal and charged to a value corresponding to a peak value of the signal. A switch is then opened to isolate the capacitor. When the signal rises to within a selected threshold, relative to the stored value, a comparator produces a command signal to close the switch, again coupling the capacitor to the signal. The peak detector can also include a tracking circuit that controls the capacitor to track the oscillating signal while the switch is closed, a timer circuit that closes the switch and activates the tracking circuit if more than a selected time passes without production of a command signal, a circuit that controls the polarity of a leakage current of the capacitor, a further auxiliary capacitor and a further auxiliary switch with a further control logic.

Abstract translation: 峰值检测器电路接收振荡电源信号。 电容器可选地耦合到信号并充电到与信号的峰值对应的值。 然后打开开关以隔离电容器。 当信号上升到所选择的阈值内时，相对于存储值，比较器产生一个命令信号来闭合开关，再次将电容器耦合到信号上。 峰值检测器还可以包括跟踪电路，该跟踪电路控制电容器在开关闭合时跟踪振荡信号;定时器电路关闭开关并激活跟踪电路，如果超过所选时间经过而不产生指令信号， 控制电容器的漏电流的极性的电路，另外的辅助电容器和具有另外的控制逻辑的另外的辅助开关。