Abstract:
A mask including: a transparent substrate and a light blocking layer thereon. The transparent substrate includes a first transmitting portion and a second transmitting portion each configured to pass light, and a light blocking portion configured to block light. The first transmitting portion includes a first transmitting region configured to pass light and a first light blocking region configured to block light, and area centers of the first transmitting region and the first light blocking region substantially coincide. The second transmitting portion includes a second transmitting region configured to pass light and a second light blocking region configured to block light, and area centers of the second transmitting region and the second light blocking region substantially coincide, so that the first transmitting portion is configured to pass light of a greater intensity and the second transmitting portion is configured to pass light of a lesser intensity.
Abstract:
A phase shift device includes a phase shift mask which includes a transparent substrate, and a phase shift pattern which is provided on the transparent substrate, and includes a first area having a first thickness, a second area having a second thickness which is less than the first thickness, a first opening having a first opening width and defined at the first area, and a second opening having a second opening width and defined at the second area.
Abstract:
A display device may include first, second, and third sub-pixels. Each of the first, second, and third sub-pixels may include: a pixel circuit layer including first, second, and third transistors disposed on a substrate, and a bridge pattern disposed on a gate electrode of the first transistor and a source electrode of the second transistor, a first end of the bridge pattern is electrically connected to the source electrode of the second transistor and a second end of the bridge pattern is electrically connected to the gate electrode of the first transistor; first and second alignment electrodes disposed on the pixel circuit layer; and light emitting elements disposed on the first and second alignment electrodes and electrically connected to at least one of the first, second, and third transistors. The second alignment electrode may be supplied with a low potential voltage and overlap the bridge pattern in a plan view.