Driver and display device
    11.
    发明授权

    公开(公告)号:US12293695B2

    公开(公告)日:2025-05-06

    申请号:US18403346

    申请日:2024-01-03

    Abstract: A driver is disposed in a display panel, and includes a plurality of stages. At least one stage of the plurality of stages includes an input circuit which transfers an input signal to a first node in response to at least one of a clock signal and an inverted clock signal, and inverters which generate an output signal based on a voltage of the first node. At least one of the inverters includes a p-type metal-oxide-semiconductor (“PMOS”) transistor and an n-type metal-oxide-semiconductor (“NMOS”) transistor connected in series between a line transferring a relatively high gate voltage and a line transferring a relatively low gate voltage. A first active region of the PMOS transistor includes a material different from a material of a second active region of the NMOS transistor.

    Display panel test circuit and display device including the same

    公开(公告)号:US12236817B2

    公开(公告)日:2025-02-25

    申请号:US17889250

    申请日:2022-08-16

    Abstract: A display device includes a first pixel row, a first first-structure transmission line, a first second-structure transmission line, a first transistor, and a second transistor. The first pixel row includes a first first-color sub-pixel and a second first-color sub-pixel both for displaying a first color. The first second-structure transmission line neighbors the first first-structure transmission line with no intervening transmission line analogous to the first first-structure transmission line or the first second-structure transmission line being disposed between the first first-structure transmission line and the first second-structure transmission line. The first transistor is electrically connected through the first first-structure transmission line to the first first-color sub-pixel and receives a first test voltage. The second transistor is electrically connected through the first second-structure transmission line to the second first-color sub-pixel and receives a second test voltage different from the first test voltage.

    Display device
    14.
    发明授权

    公开(公告)号:US12029082B2

    公开(公告)日:2024-07-02

    申请号:US17090056

    申请日:2020-11-05

    CPC classification number: H10K59/131 H10K50/844

    Abstract: A display device includes: a base layer comprising a first portion, a second portion extending from the first portion, and a third portion extending from the second portion; a first light emitting element disposed on the first portion; a first front signal line electrically connected to the first light emitting element and disposed on the first portion; a second front signal line electrically connected to the first front signal line, disposed on the first portion, disposed in a different layer from the first front signal line, and overlapping the first front signal line; a first connection line electrically connected to the first and second front signal lines, disposed on the second portion, and disposed in a different layer from the first and second front signal lines; and a first rear signal line electrically connected to the first connection line and disposed on the third portion.

    Display device
    15.
    发明授权

    公开(公告)号:US10903298B2

    公开(公告)日:2021-01-26

    申请号:US16799101

    申请日:2020-02-24

    Abstract: A display device includes: a plurality of pixels each including a driving thin film transistor and a storage capacitor, wherein each of the pixels further includes: a driving semiconductor layer including a driving channel region, a driving source region, and a driving drain region; a first electrode layer, a portion of the first electrode layer overlapping the driving channel region; a second electrode layer overlapping the first electrode layer; a node connection line having a first side connected to the first electrode layer: a pixel electrode overlapping the first electrode layer and the second electrode layer; and a shielding layer between the first electrode layer and the pixel electrode and overlapping the first electrode layer, the node connection line, and the pixel electrode.

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