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公开(公告)号:US20210104197A1
公开(公告)日:2021-04-08
申请号:US17065075
申请日:2020-10-07
Applicant: Samsung Display Co., LTD.
Inventor: Yang Hwa CHOI , Bo Yong CHUNG , Tak Young LEE , Sang Uk LIM
IPC: G09G3/3266
Abstract: A scan driver for a display device includes a plurality of stages outputting scan signals. A first stage of the plurality of stages includes first to sixth transistors connected to a first carry clock line, a carry line, a previous carry line, and a second carry clock line. In a first frame period, the second carry clock line is configured to receive a second carry clock signal having at least one pulse with substantially the same phase as at least one of first pulses of a first carry clock signal to be applied to the first carry clock line.
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公开(公告)号:US20200184898A1
公开(公告)日:2020-06-11
申请号:US16707994
申请日:2019-12-09
Applicant: Samsung Display Co., Ltd.
Inventor: Yang Hwa CHOI , Jun Hyun PARK , Dong Woo KIM , Kang Moon JO , Sung Jae MOON , An Su LEE , Woong Sik CHOI
IPC: G09G3/3266 , G09G3/3258 , G09G3/3275
Abstract: A stage of a scan driver includes: a first driving controller for controlling a voltage of a first node and a voltage of a second node; a second driving controller for controlling a voltage of a first driving node, based on a sensing-on signal, a next carry signal, a first control clock signal, a second control clock signal, the voltage of the first node, and a voltage of a sampling node, and controlling a voltage of a second driving node, based on the voltage of the sampling node and the voltage of the first driving node; an output buffer for outputting a carry signal, the first scan signal, and the second scan signal; and a coupling controller. The second driving controller maintains the voltage of the first driving node as a gate-off voltage in response to the voltage of the second driving node and a third control clock signal.
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公开(公告)号:US20190237020A1
公开(公告)日:2019-08-01
申请号:US16264199
申请日:2019-01-31
Applicant: Samsung Display Co., Ltd.
Inventor: Jun Hyun PARK , Cheol Gon LEE , Yang Hwa CHOI
IPC: G09G3/3258 , G09G3/3266
CPC classification number: G09G3/3258 , G09G3/3266 , G09G2300/0426 , G09G2300/0819 , G09G2300/0842 , G09G2310/08 , G09G2320/0233 , G09G2330/021
Abstract: An organic light emitting (OLE) display device includes pixels connected to scan lines (SLs), data lines (DLs), and a first control line (FCL) commonly connected to the pixels. Each pixel includes: an OLE diode connected between a first power source (PS) and a second PS; a first transistor (TFT1) connected between the first PS and the OLE diode, a gate electrode (GE) of the TFT1 being connected to a first node (N1); a second transistor (TFT2) connected between the N1 and a second node (N2), a GE of the TFT2 being connected to a SL; a third transistor (TFT3) connected between the N2 and a third node (N3), the N3 being connected between the TFT1 and the OLED, a GE of the TFT3 being connected to the FCL; a first capacitor connected between the first PS and the N1; and a second capacitor connected between the N2 and a DL.
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