Abstract:
A liquid crystal display according to an exemplary embodiment includes: a first subpixel electrode configured to have a first voltage applied thereto; a second subpixel electrode configured to have a second voltage applied thereto; a third subpixel electrode configured to have a third voltage applied thereto; an insulating layer between the first subpixel electrode and the second subpixel electrode or between the second subpixel electrode and the third subpixel electrode; and a common electrode configured to have a common voltage applied thereto, wherein the second subpixel electrode and the third subpixel electrode overlap each other with the insulating layer positioned therebetween, the first subpixel electrode and the third subpixel electrode are disposed at opposing sides of the gate line, and the first voltage and the third voltage are different.
Abstract:
A display apparatus includes a plurality of pixels. A pixel includes a first capacitor connected between a first voltage line receiving a first driving signal and a first node, a first transistor comprising a control electrode connected to the first node, a first electrode connected to a second voltage line receiving a first power source signal and a second electrode connected to a second node, an organic light emitting diode comprising an anode electrode connected to the second node and a cathode electrode receiving a second power source signal, a second capacitor connected between an m-th data line and the second node (wherein, ‘m’ is a natural number) and a second transistor comprising a control electrode connected to an n-th scan line (wherein, ‘n’ is a natural number), a first electrode connected to the first node and a second electrode connected to the second node.
Abstract:
A display apparatus includes a plurality of pixels. A pixel includes a first capacitor connected between a first voltage line receiving a first driving signal and a first node, a first transistor comprising a control electrode connected to the first node, a first electrode connected to a second voltage line receiving a first power source signal and a second electrode connected to a second node, an organic light emitting diode comprising an anode electrode connected to the second node and a cathode electrode receiving a second power source signal, a second capacitor connected between an m-th data line and the second node (wherein, ‘m’ is a natural number) and a second transistor comprising a control electrode connected to an n-th scan line (wherein, ‘n’ is a natural number), a first electrode connected to the first node and a second electrode connected to the second node.
Abstract:
A display panel includes a plurality of pixels which is arranged in a pixel column and a pixel row, a gate line which is connected to pixels in a same pixel row, a first data line which is connected to pixels in a same pixel column, and a second data line which is connected to remaining pixels except for the pixels connected to the first data line among the pixels in the same pixel column. Two odd-numbered pixel rows and two even-numbered pixel rows are alternately driven so that a charge period of the pixel may be extended by 2H. In addition, a kickback difference between the odd-numbered pixel row and the even-numbered pixel row may be decreased so that a display quality may be improved.
Abstract:
A display apparatus includes; a data driver integrated in one chip and which outputs data signals; a gate driver which sequentially outputs gate signals, a display panel which includes; a plurality of data lines which receive the data signals, a plurality of gate lines which receive the gate signals, and a plurality of pixels connected to a corresponding gate line and a corresponding data line, a voltage generator which generates a common voltage and a storage voltage and provides them to the display panel, and a voltage compensator which receives the storage voltage fedback from the display panel and generates a compensation signal, wherein the display panel further includes a feedback line which provides the voltage compensator with the storage voltage, and wherein the feedback line is electrically connected to the voltage compensator through the data driver.