Abstract:
The present invention relates to a thin film transistor array substrate and a method of manufacturing the same. The thin film transistor array substrate may comprise a substrate which has a plurality of gate lines extending in a column direction along a boundary of pixels, a plurality of data lines extending in a row direction along the boundary of the pixels, and at least one thin film transistor formed in the pixel region; a first insulating film which covers the thin film transistor; a color organic film which is disposed on the first insulating film and has a valley area formed with a valley by partial superimposition of organic films of different colors based on the data lines; a second insulating film which covers the color organic film and the valley area; and a pixel electrode which is disposed on the second insulating film and connected to the thin film transistor via a contact hole, wherein the thin film transistor array substrate is provided with a separating organic film which extends from the color organic film and is disposed between the valley area and the contact hole.
Abstract:
An LCD device includes: a first substrate; a gate line and a data line on the first substrate; at least one TFT connected to the gate and data lines and comprising source and drain electrodes; a pixel electrode connected to the TFT; a second substrate; a liquid crystal layer between the first and second substrates; a common electrode on one of the first and second substrates; a black matrix disposed on one of the first and second substrates and configured to at least partially define a pixel region; a color filter disposed to correspond to the pixel region; and a cell gap adjustment layer disposed on one of the first and second substrates and positioned so as to form different cell gaps within one pixel region.
Abstract:
A thin film transistor array panel includes: a substrate; a first gate electrode on the substrate; a gate insulating layer on the gate electrode; a semiconductor on the gate insulating layer; an etch stopper on a channel of the semiconductor; a source electrode and a drain electrode on the semiconductor and facing each other with respect to the first gate electrode; and a second gate electrode on the channel of the semiconductor and in a same layer as the source electrode and the drain electrode. The second gate electrode is electrically separated from the source electrode and the drain electrode.
Abstract:
A display device includes: a first substrate in which a display area and a non-display area disposed outside the display area are defined; a second substrate facing the first substrate; and a cell seal disposed on the non-display area, where the cell seal includes a bonding filament connecting the first substrate and the second substrate to each other.
Abstract:
A display device includes a first gate line extending in a first direction, a first pixel column group connected to the first gate line and alternately receiving data voltages with a first polarity pattern and data voltages with a second polarity pattern, which is an inverted polarity pattern of the first polarity pattern, at an interval of a unit of a frame, and a plurality of data lines respectively connected to a plurality of pixels included in the first pixel column group, wherein each of the pixels includes a first sub-pixel to which a first voltage is applied and a second sub-pixel to which a second voltage, which is lower than the first voltage, is applied and a maximum width, in the first direction, of the first sub-pixel is greater than a maximum width, in the first direction, of the second sub-pixel.
Abstract:
A liquid crystal display device includes a lower display substrate, an upper polarizing plate and a liquid crystal layer between the lower display substrate and the upper polarizing plate. The lower display substrate includes a base substrate; a thin film transistor on the base substrate; and a color filter layer on the thin film transistor. The liquid crystal layer is disposed on the color filter layer of the lower display substrate. The upper polarizing plate is disposed on the liquid crystal layer and includes an insulating substrate, a polarizer and a protective layer which are sequentially stacked from the liquid crystal layer.
Abstract:
A liquid crystal display according to an exemplary embodiment of the invention includes a substrate, a gate line and a data line disposed on the substrate, a first passivation layer disposed on the gate line and the data line, a first electrode disposed on the first passivation layer, a second passivation layer disposed on the first electrode, and a second electrode disposed on the second passivation layer and including a plurality of first cutouts and a plurality of branch electrodes defined by the plurality of first cutouts, wherein the second passivation layer has a second cutout overlapping a portion of the plurality of first cutouts, and the second cutout is defined close to the end of the first cutout.
Abstract:
A liquid crystal display includes a first substrate, a first electrode disposed on the first substrate, a second electrode which is disposed on the first substrate and overlaps the first electrode, an insulating layer interposed between the first electrode and the second electrode, a first alignment layer disposed on the first electrode and the second electrode, a second substrate facing the first substrate, and a second alignment layer disposed on the second substrate, where a first resistivity value of the first alignment layer is smaller than a second resistivity value of the second alignment layer.
Abstract:
A liquid crystal display includes: a first insulation substrate; a first gate conductor disposed on the first insulation substrate and in a same layer as a gate line and a second gate conductor disposed on the first insulation substrate and in the same layer as the gate line; a gate insulating layer disposed on the first gate conductor and the second gate conductor; a data conductor disposed on the gate insulating layer and in a same layer as a data line; a thin film transistor disposed on the first insulation substrate; a first spacer disposed on the first insulation substrate; and a second spacer disposed on the first insulation substrate, where heights or widths of the first and second spacers are different from each other and having different heights or widths, and the second spacer overlaps the first gate conductor and the second gate conductor.
Abstract:
A thin film transistor array panel according to an exemplary embodiment of the invention includes: an insulating substrate; a gate line disposed on the insulating substrate and including a gate pad portion; a data line insulated from and crossing the gate line, and including a source electrode and a data pad portion; a drain electrode facing the source electrode; an organic insulating layer disposed on the data line and the drain electrode, and including a first contact hole; a common electrode disposed on the organic insulating layer, and including a second contact hole; a passivation layer disposed on the common electrode, and including a third contact hole; and a pixel electrode disposed on the passivation layer, and being in contact with the drain electrode, in which the third contact hole is disposed to be adjacent to one surface of the first contact hole for improvement of an aperture ratio and a stable electrode connection.