Abstract:
A gate driver for a display device and a display device including the same are disclosed. In one aspect, the gate driver includes first through N-th scan drivers configured to respectively output first through N-th scan signals, where N is an integer greater than 1. The gate driver also includes first through N-th sensing drivers configured to respectively output first through N-th sensing signals, wherein an M-th one of the first through N-th sensing drivers is configured to activate an M-th one of the first through N-th sensing signals K times during an active period of an (M+1)-th one of the first through N-th scan signals, where M is an integer greater than 0 and less than N and K is an integer greater than 1.
Abstract:
A gate driver for a display device and a display device including the same are disclosed. In one aspect, the gate driver includes first through N-th scan drivers configured to respectively output first through N-th scan signals, where N is an integer greater than 1. The gate driver also includes first through N-th sensing drivers configured to respectively output first through N-th sensing signals, wherein an M-th one of the first through N-th sensing drivers is configured to activate an M-th one of the first through N-th sensing signals K times during an active period of an (M+1)-th one of the first through N-th scan signals, where M is an integer greater than 0 and less than N and K is an integer greater than 1.
Abstract:
A current memory cell includes an amplifier, transistor, first and second capacitors, and first to third switching units. The amplifier includes first to third terminals. The transistor is coupled to first and second nodes, and ground. The first capacitor is coupled between the second node and ground. The second capacitor is coupled between a third node and ground. The first unit couples a current source to the first node during a first period and an output line to the first node during a second period. The second unit couples the first node to the second node during the first period. The third unit couples the first terminal to the second node and couples the second and third terminals to the third node during the first period, and couples the first terminal to the third node and couples the second and third terminals to the second node during the second period.
Abstract:
A display device includes: a display including a plurality of pixels; and a controller configured to: receive an external input image signal, adjust the external input image signal to compensate for brightness deviations of the pixels, and transmit corresponding image data signals to the pixels, wherein the controller includes: a data input section configured to receive the external input image signal and transmit a test image data signal to the pixels through a data driver, a luminance information extracting section configured to: extract brightness information for the pixels after displaying a test image in accordance with the test image data signal, and calculate first, second, and third parameters, using the brightness information, and a data compensating section configured to generate the image data signals by adjusting the external input image signal based on the first, second, and third parameters.
Abstract:
An organic light emitting display device includes pixels positioned at crossing regions between data lines and scan lines, each of the pixels including an organic light emitting diode, a scan driver configured to supply a scan signal to scan lines, a data driver configured to drive the data lines, wherein the data driver includes, in each channel, a supply part comprising a digital-to-analog converter configured to generate data signals using second data supplied from outside in a driving period, and a deterioration part configured to measure deterioration information of the organic light emitting diode using the digital-to-analog converter in a sensing period.
Abstract:
A noise-removing circuit includes a first capacitor to charge a first voltage supplied to a first node during a first period in which a first switching control signal is supplied, a second capacitor to charge a second voltage supplied to a third node during the first period, a third capacitor to charge the first voltage during a second period in which a second switching control signal is supplied, and to charge the second voltage charged in the second capacitor as a third voltage during a third period in which a third switching control signal is supplied, a fourth capacitor to charge the second voltage during the second period, and to charge the first voltage charged in the first capacitor as a fourth voltage during the third period, and a differential amplifier to output a voltage difference between the third voltage and the fourth voltage.
Abstract:
An error compensator and an organic light emitting display device using the same. The organic light emitting display device includes pixels each having a driving transistor and an organic light emitting diode; and a sensing unit extracting at least one of a first information including the threshold voltage of the driving transistor or a second information including the degradation of the organic light emitting diode from a pixel of the pixels. In the organic light emitting display device, the sensing unit includes an amplifier amplifying a voltage corresponding to the at least one of the first information or the second information; and an error compensator compensating for error components of elements included in the amplifier and the error compensator.
Abstract:
A pixel array and an organic light emitting display device including the same, can display an image with uniform luminance by compensating for a variation in threshold voltage/mobility of a driving transistor for each pixel and compensating for a change in efficiency due to degradation of an organic light emitting diode. A first pixel among the pixel array includes an organic light emitting diode; a pixel circuit positioned among an anode electrode of the organic light emitting diode, a first scan line and a first data line through which a data signal is supplied to the first pixel, and controlling current flowing in the organic light emitting diode; and a switching element controlling the coupling between a second data line through which a data signal is supplied to a second pixel of the plurality of pixels and the anode electrode of the organic light emitting diode.
Abstract:
A current memory cell includes an amplifier, transistor, first and second capacitors, and first to third switching units. The amplifier includes first to third terminals. The transistor is coupled to first and second nodes, and ground. The first capacitor is coupled between the second node and ground. The second capacitor is coupled between a third node and ground. The first unit couples a current source to the first node during a first period and an output line to the first node during a second period. The second unit couples the first node to the second node during the first period. The third unit couples the first terminal to the second node and couples the second and third terminals to the third node during the first period, and couples the first terminal to the third node and couples the second and third terminals to the second node during the second period.
Abstract:
A noise-removing circuit includes a first capacitor to charge a first voltage supplied to a first node during a first period in which a first switching control signal is supplied, a second capacitor to charge a second voltage supplied to a third node during the first period, a third capacitor to charge the first voltage during a second period in which a second switching control signal is supplied, and to charge the second voltage charged in the second capacitor as a third voltage during a third period in which a third switching control signal is supplied, a fourth capacitor to charge the second voltage during the second period, and to charge the first voltage charged in the first capacitor as a fourth voltage during the third period, and a differential amplifier to output a voltage difference between the third voltage and the fourth voltage.