DISPLAY DEVICE AND METHOD FOR CONTROLLING DISPLAY DEVICE

    公开(公告)号:US20240355282A1

    公开(公告)日:2024-10-24

    申请号:US18602194

    申请日:2024-03-12

    发明人: Hidekazu MIYATA

    IPC分类号: G09G3/3233

    摘要: A display device includes a light-emitting element, a first transistor, a second transistor, a third transistor, a drive circuit, and a voltage compensation circuit. The drive circuit supplies, in an initial period, an initial voltage to a gate electrode of the first transistor, and supplies a data signal to the first electrode in a write period succeeding the initial period, and turns ON the third transistor. The voltage compensation circuit includes a first capacitive element, a second capacitive element, a first switch, and a second switch. The voltage compensation circuit switches, when the write period starts, from the state in which the second switch is ON to the state in which the second switch is OFF, and turns ON the first switch after the write period starts. The drive circuit turns ON the second transistor in a light ON period succeeding the turning ON of the first switch.

    ORGANIC LIGHT-EMITTING DISPLAY APPARATUS
    3.
    发明公开

    公开(公告)号:US20240296794A1

    公开(公告)日:2024-09-05

    申请号:US18658590

    申请日:2024-05-08

    摘要: An organic light-emitting display apparatus including an organic light-emitting diode emitting visible light, a driving thin film transistor driving the organic light-emitting diode, and a compensation thin film transistor. The compensation thin film transistor includes a compensation gate electrode, a compensation semiconductor layer, a compensation source electrode, and a compensation drain electrode. The compensation gate electrode includes a first gate electrode, and a second gate electrode electrically connected to the first gate electrode. The compensation drain electrode is electrically connected to the driving gate electrode of the driving thin film transistor. The compensation semiconductor layer includes a first semiconductor region overlapping the first gate electrode and a second semiconductor region overlapping the second gate electrode and disposed further from the compensation drain electrode than the first semiconductor region, and an area of the first semiconductor region is different than an area of the second semiconductor region.

    DUAL-SIDE ORGANIC LIGHT EMITTING DISPLAY DEVICE

    公开(公告)号:US20240224661A1

    公开(公告)日:2024-07-04

    申请号:US18508985

    申请日:2023-11-14

    摘要: A dual-side organic light emitting display device comprising a transparent substrate including a pixel region, the pixel region including first and second regions; first and second driving elements in the first region and over the transparent substrate; a first organic light emitting diode in the second region and over the first and second driving elements, the first organic light emitting diode including a first electrode connected to the first driving element, a second electrode disposed over the first electrode and a first organic light emitting layer between the first and second electrodes; and a second organic light emitting diode in the first and second regions and on the first organic light emitting diode, the second organic light emitting diode including a third electrode disposed over the second electrode and connected to the second driving element and a second organic light emitting layer between the second and third electrodes.

    PIXEL CIRCUIT AND DISPLAY DEVICE INCLUDING THE SAME

    公开(公告)号:US20240212615A1

    公开(公告)日:2024-06-27

    申请号:US18475830

    申请日:2023-09-27

    IPC分类号: G09G3/3233

    摘要: Disclosed is a pixel circuit. The pixel circuit includes: a driving element connected to a first node, a second node, and a third node; a first switch element configured to be turned on to supply a data voltage to a fourth node; a second switch element configured to be turned on to supply a reference voltage or an initialization voltage to the fourth node; a third switch element configured to be turned on to connect the first node to the second node; a fourth switch element configured to be turned on to supply the reference voltage to the third node; a fifth switch element configured to be turned on a fourth gate signal to supply a pixel driving voltage to the first node; and a sixth switch element configured to be turned on to connect the third node to a fifth node.

    DISPLAY DEVICE AND DISPLAY PANEL
    7.
    发明公开

    公开(公告)号:US20240212574A1

    公开(公告)日:2024-06-27

    申请号:US18511490

    申请日:2023-11-16

    IPC分类号: G09G3/20 G09G3/32

    摘要: Discussed are a display panel and a display device having the same. The display panel includes a plurality of subpixels. A gate line, a data line, and a reference voltage line are further disposed on the display panel. A gate driving circuit supplies a scan signal to the gate line. A data driving circuit converts image data into a data voltage and supplies the data voltages to the data line. A timing controller controls the gate driving circuit and the data driving circuit and generates compensation data for the image data using a sensing voltage detected through the reference voltage line. The display panel includes a plurality of sensing transistors disposed around a corresponding subpixel among the plurality of subpixels to connect the data line and the reference voltage line.

    Display clock signaling with reduced power consumption

    公开(公告)号:US12020649B2

    公开(公告)日:2024-06-25

    申请号:US17758677

    申请日:2020-08-24

    申请人: GOOGLE LLC

    IPC分类号: G09G3/3266 G09G3/3225

    摘要: A display can include a plurality of pixels arranged in a matrix of rows and columns, and a gate driver circuit including a plurality of row drivers configured as a shift register that sequentially and individually addresses the rows. The display panel can also include a first clock circuit configured to provide a first set of clock signals to a first portion of the row drivers to address a respective first portion of the rows. The first clock circuit can include a signal distribution circuit having a first input impedance. The display panel can also include a second clock circuit configured to provide a second set of clock signals to a second portion of the row drivers to address a respective second portion of the rows. The second clock circuit can include a signal distribution circuit having a second input impedance that is matched with the first input impedance.