公开(公告)号：US09559127B2

公开(公告)日：2017-01-31

申请号：US14585336

申请日：2014-12-30

Applicant: Samsung Display Co., Ltd.

Inventor： Daisuke Inoue ,  Mi Suk Kim ,  Si Heun Kim ,  Tae Ho Kim ,  So Youn Park ,  Keun Chan Oh ,  Chang-Hun Lee

IPC: H01L27/14 ,  H01L29/04 ,  H01L29/15 ,  H01L31/036 ,  H01L27/12 ,  H01L29/49 ,  H01L29/51 ,  H01L29/417 ,  G02F1/1365 ,  G02F1/1333

CPC classification number: H01L27/124 ,  G02F1/133345 ,  G02F1/1362 ,  G02F1/1365 ,  H01L29/41733 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/517

Abstract: A thin film transistor array panel includes an insulation substrate; a gate line and a first electrode on the insulation substrate; a gate insulating layer on the gate line and the first electrode; a data line on the gate insulating layer; a passivation layer on the gate insulating layer and the data line; and a second electrode on the passivation layer. Relative permittivity (ε) of the gate insulating layer is more than about 15, and a thickness of the gate insulating layer is about 2000 angstroms.

Abstract translation: 薄膜晶体管阵列面板包括绝缘基板; 绝缘基板上的栅极线和第一电极; 栅极线上的栅极绝缘层和第一电极; 栅极绝缘层上的数据线; 栅极绝缘层和数据线上的钝化层; 以及钝化层上的第二电极。 栅绝缘层的相对介电常数（ε）大于约15，栅极绝缘层的厚度约为2000埃。