公开(公告)号：US10965934B2

公开(公告)日：2021-03-30

申请号：US15400098

申请日：2017-01-06

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyo Chan An ,  Min Chul Kim ,  Yon Jun Shin ,  Sang Heon Lee ,  Dae Keon Park ,  Woon Yong Jo

IPC: H04N17/00

Abstract: A system on chip includes a display serial interface (DSI) host device, a camera serial interface (CSI) host device, a first register, and a loopback control circuit. The first register is configured to store a first flag indicating whether the system on chip is operating in a loopback mode or a non-loopback mode. The loopback control circuit is configured to loop back data generated by the DSI host device to the CSI host device in response to the first flag indicating that the system on chip is operating in the loopback mode.

公开(公告)号：US10554865B2

公开(公告)日：2020-02-04

申请号：US15405640

申请日：2017-01-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jong Hyup Lee ,  Min Chul Kim ,  Sung Hoo Choi

IPC: G06F3/038 ,  G09G5/00 ,  H04N5/06 ,  G09G3/20

Abstract: In a display controller for generating a video sync signal using an external clock, he display controller includes an initializer configured to initialize an internal parameter in response to a frame start signal. A sync signal generation circuit is configured to count the external clock, increase the internal parameter, and generate the video sync signal according to a result of comparing the internal parameter that has been increased with a setting value. An original use of the external clock may not be generating the video sync signal.

公开(公告)号：US20180341290A1

公开(公告)日：2018-11-29

申请号：US15988575

申请日：2018-05-24

Applicant: Samsung Electronics Co .. Ltd.

Inventor： Young Bae Sim ,  Hyun Suk Choi ,  DoYeong Kim ,  Min Chul Kim ,  Sang Yup Lee ,  Sung Yoon Jung ,  Jin Woo Park ,  Ji Woo Lee ,  Yeun Wook Lim

IPC: G06F1/16 ,  H05K5/00 ,  G06F3/0354 ,  G06F3/042

CPC classification number: G06F1/1643 ,  G06F1/1626 ,  G06F1/163 ,  G06F1/1637 ,  G06F1/1658 ,  G06F1/1684 ,  G06F3/03545 ,  G06F3/041 ,  G06F3/042 ,  G06K9/00013 ,  G06K9/0004 ,  G06K9/22 ,  H05K5/0017 ,  H05K5/0086 ,  H05K9/0054

Abstract: An electronic device is provided. The electronic device includes a housing including a first plate, a second plate facing away from the first plate, and a side member surrounding a space between the first plate and the second plate, a touch screen display disposed between the first plate and the second plate, a fingerprint sensor, a digitizer including a layer having a conductive pattern, and a processor. The layer includes a first portion positioned between the second plate and a second area of the touch screen display that surrounds the first area when viewed from above the first plate and a second portion continuously extending from the first portion, the second portion positioned such that the fingerprint sensor is disposed between the second portion and the touch screen display, and such that the second portion is closer to the second plate than the first portion.

公开(公告)号：USD781955S1

公开(公告)日：2017-03-21

申请号：US29531820

申请日：2015-06-30

Applicant: Samsung Electronics Co., Ltd.

Designer： Min Chul Kim ,  Seung Wook Jeong ,  Tae Kung Park

公开(公告)号：USD778984S1

公开(公告)日：2017-02-14

申请号：US29533180

申请日：2015-07-15

Applicant: Samsung Electronics Co., Ltd.

Designer： Jong Kyu Kim ,  Min Chul Kim ,  Seung Wook Jeong

公开(公告)号：USD771183S1

公开(公告)日：2016-11-08

申请号：US29531835

申请日：2015-06-30

Applicant: Samsung Electronics Co., Ltd.

Designer： Jong Kyu Kim ,  Kwang Hyuck So ,  Min Chul Kim

公开(公告)号：US20170208219A1

公开(公告)日：2017-07-20

申请号：US15405640

申请日：2017-01-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jong Hyup Lee ,  Min Chul Kim ,  Sung Hoo Choi

IPC: H04N5/06 ,  G09G3/20

CPC classification number: H04N5/06 ,  G09G3/2096 ,  G09G5/008 ,  G09G5/12 ,  G09G2310/08 ,  G09G2320/0247 ,  G09G2360/10 ,  G09G2370/10

Abstract: In a display controller for generating a video sync signal using an external clock, he display controller includes an initializer configured to initialize an internal parameter in response to a frame start signal. A sync signal generation circuit is configured to count the external clock, increase the internal parameter, and generate the video sync signal according to a result of comparing the internal parameter that has been increased with a setting value. An original use of the external clock may not be generating the video sync signal.

公开(公告)号：USD769968S1

公开(公告)日：2016-10-25

申请号：US29531875

申请日：2015-06-30

Applicant: Samsung Electronics Co., Ltd.

Designer： Kwang Hyuck So ,  Min Chul Kim ,  Jong Kyu Kim ,  Tae Kung Park ,  Seung Wook Jeong