公开(公告)号：US10930848B2

公开(公告)日：2021-02-23

申请号：US16415424

申请日：2019-05-17

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Byongju Kim ,  Young-Min Ko ,  Jonguk Kim ,  Jaeho Jung ,  Dongsung Choi

IPC: H01L45/00 ,  H01L21/02

Abstract: A method of manufacturing a variable resistance memory device includes: forming an array of memory cells on a substrate, each memory cell including a variable resistance structure and a switching element; and forming a sidewall insulating layer covering a sidewall of the switching element. The forming the sidewall insulating layer includes: a preliminary step of supplying a silicon source to an exposed sidewall of the switching element; and a main step of performing a process cycle a plurality of times, the process cycle comprising supplying the silicon source and supplying a reaction gas, A time duration of the supplying the silicon source in the preliminary step is longer than a time duration of the supplying the silicon gas in the process cycle in the main step.

公开(公告)号：US10566530B2

公开(公告)日：2020-02-18

申请号：US16170108

申请日：2018-10-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Changyup Park ,  Jeonghee Park ,  Jaeho Jung

IPC: H01L45/00 ,  H01L27/24

Abstract: Disclosed is a method of fabricating a semiconductor device. The method may include forming a mold layer on a substrate, the mold layer having a hole exposing a portion of the substrate, forming a phase transition layer with a void, in the hole, and thermally treating the phase transition layer to remove the void from the phase transition layer. The thermal treating of the phase transition layer may include heating the substrate to a first temperature to form a diffusion layer in the phase transition layer, and the first temperature may be lower than or equal to 55% of a melting point of the phase transition layer.

公开(公告)号：US20250015182A1

公开(公告)日：2025-01-09

申请号：US18444592

申请日：2024-02-16

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Siyeong Yang ,  Yuyeon Kim ,  Jaeho Jung

IPC: H01L29/78 ,  H01L25/065 ,  H01L29/66 ,  H10B41/27 ,  H10B43/27 ,  H10B80/00

Abstract: A semiconductor device includes a gate stacking structure that includes a plurality of gate electrodes and a plurality of insulating layers alternately stacked with each other, and a plurality of channel structures that penetrate the gate stacking structure. The plurality of channel structures include a first channel structure that includes a first channel layer, and a plurality of second channel structures adjacent to the first channel structure and that include a plurality of second channel layers. The first channel layer in the first channel structure and the plurality of second channel layers in the plurality of second channel structures have a same crystal orientation.

公开(公告)号：US11456414B2

公开(公告)日：2022-09-27

申请号：US16416472

申请日：2019-05-20

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jonguk Kim ,  Young-Min Ko ,  Byongju Kim ,  Jaeho Jung ,  Dongsung Choi

IPC: H01L27/24 ,  H01L45/00

Abstract: A method of manufacturing a variable resistance memory device may include: forming a memory cell including a variable resistance pattern on a substrate; performing a first process to deposit a first protective layer covering the memory cell; and performing a second process to deposit a second protective layer on the first protective layer. The first process and the second process may use the same source material and the same nitrogen reaction material, and a nitrogen content in the first protective layer may be less than a nitrogen content in the second protective layer.

公开(公告)号：US11328396B2

公开(公告)日：2022-05-10

申请号：US16232711

申请日：2018-12-26

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jaeho Jung ,  Yeultak Sung

IPC: G06K9/00 ,  G06T5/50 ,  G06T7/246 ,  G06T5/00

Abstract: Provided is an artificial intelligence (AI) system that mimics functions, such as recognition and determination by human brains, by utilizing a machine learning algorithm, such as deep learning, and applications of the AI system. An image acquisition device is disclosed including a camera configured to acquire a first image, wherein a portion of a main object is hidden from the camera by a sub-object; at least one processor configured to input the first image to a first AI neural network; detect, by the first AI neural network from data corresponding to a plurality of objects included in the first image, first data corresponding to the main object and second data corresponding to the sub-object from the first image by inputting the first image to an AI neural network, remove the sub-object from the first image, and generate, using a second AI neural network, a second image by restoring third data corresponding to at least a portion of the main object hidden by the removed sub-object by using the AI neural network, wherein the third data replaces the second data; and a display configured to display at least one of the first image and the second image.

公开(公告)号：US20210050520A1

公开(公告)日：2021-02-18

申请号：US16874781

申请日：2020-05-15

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Youngmin Ko ,  Jonguk Kim ,  Jaeho Jung ,  Dongsung Choi

IPC: H01L45/00 ,  H01L27/24 ,  H01L21/02 ,  B05D1/00 ,  C08G77/20

Abstract: A method for manufacturing a semiconductor device includes forming a first pattern structure having a first opening on a lower structure comprising a semiconductor substrate. The first pattern structure includes a stacked pattern and a first spacer layer covering at least a side surface of the stacked pattern. A first flowable material layer including a SiOCH material is formed on the first spacer layer to fill the first opening and cover an upper portion of the first pattern structure. A first curing process including supplying a gaseous ammonia catalyst into the first flowable material layer is performed on the first flowable material layer to form a first cured material layer that includes water. A second curing process is performed on the first cured material layer to form a first low-k dielectric material layer. The first low-k dielectric material layer is planarized to form a planarized first low-k dielectric material layer.

公开(公告)号：US10517160B2

公开(公告)日：2019-12-24

申请号：US14475891

申请日：2014-09-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Gyeyoung Lee ,  Daedong Kim ,  Dusan Baek ,  Changhyun Lee ,  Jaeho Jung ,  Yangwook Kim ,  Haein Chun

IPC: H05B37/02 ,  H05B33/08

Abstract: A lighting control method and an electronic device using the same are provided. The method includes receiving pattern information for controlling lighting, generating lighting control information including brightness level information corresponding to operation time information based on the received pattern information, and transmitting the lighting control information.