公开(公告)号：US20220059440A1

公开(公告)日：2022-02-24

申请号：US17228784

申请日：2021-04-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Myungsam KANG ,  Youngchan KO ,  Jeongseok KIM ,  Kyung Don MUN ,  Bongju CHO

IPC: H01L23/498 ,  H01L23/538 ,  H01L23/31 ,  H01L23/00

Abstract: A semiconductor package includes a redistribution substrate having a dielectric layer and a wiring pattern in the dielectric layer, the wiring pattern including a line part that extends horizontally, and a via part connected to the line part, the via part having a width less than a width of the line part, a passivation layer on a top surface of the redistribution substrate, the passivation layer including a material different from a material of the dielectric layer, a conductive pillar that penetrates the passivation layer, the conductive pillar being connected to the via part, and a connection terminal on a top surface of the conductive pillar, a distance between the top surface of the conductive pillar and a top surface of the passivation layer being greater than a thickness of the passivation layer.

公开(公告)号：US20220013454A1

公开(公告)日：2022-01-13

申请号：US17149216

申请日：2021-01-14

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Myungsam KANG ,  Youngchan KO ,  Jeongseok KIM ,  Bongju CHO

IPC: H01L23/522 ,  H01L23/00 ,  H01L23/528 ,  H01L23/532

Abstract: A semiconductor package includes: a first redistribution structure having a first surface and a second surface opposing the first surface, and including a first insulating layer and a first redistribution layer disposed on the first insulating layer; a semiconductor chip disposed on the first surface of the first redistribution structure, and including a connection pad electrically connected to the first redistribution layer and embedded in the first insulating layer; a vertical connection structure disposed on the first surface and electrically connected to the first redistribution layer; an encapsulant encapsulating at least a portion of each of the semiconductor chip and the vertical connection structure; a second redistribution structure disposed on the encapsulant and including a second redistribution layer electrically connected to the vertical connection structure; and a connection bump disposed on the second surface and electrically connected to the first redistribution layer.

公开(公告)号：US20250105117A1

公开(公告)日：2025-03-27

申请号：US18619711

申请日：2024-03-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sangseok HONG ,  Jaeseong KIM ,  Jeongseok KIM ,  Tae Wook KIM ,  Yejin LEE ,  Jooyoung CHOI

IPC: H01L23/498 ,  H01L23/00 ,  H01L25/065

Abstract: A semiconductor package may include a semiconductor chip, a redistribution layer on the semiconductor chip, a protection pattern covering the redistribution layer, and a connection terminal on the redistribution layer. The redistribution layer may include a redistribution pad on a top surface of the redistribution layer, and the redistribution pad may include a first pad and a second pad on the first pad. The second pad may have a side surface that is inclined and that extends to a top surface of the first pad, and the protection pattern may be spaced apart from the side surface of the second pad and may have a side surface that is inclined and that extends to the top surface of the first pad.

公开(公告)号：US20250079319A1

公开(公告)日：2025-03-06

申请号：US18737402

申请日：2024-06-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jeongseok KIM ,  Jaeseong KIM ,  Tae Wook KIM ,  Yejin LEE ,  Jooyoung CHOI ,  Sangseok HONG

IPC: H01L23/538 ,  H01L23/00 ,  H01L23/31 ,  H01L23/36 ,  H01L23/49 ,  H01L23/498 ,  H01L25/16 ,  H01Q1/22

Abstract: A semiconductor package may include a first redistribution substrate, a first semiconductor chip disposed on the first redistribution substrate, a second semiconductor chip horizontally spaced apart from the first semiconductor chip, a mold layer provided on the first redistribution substrate to enclose the first and second semiconductor chips, a second redistribution substrate disposed on the mold layer, a connection member, which is provided at a side of the first and second semiconductor chips to connect the first redistribution substrate to the second redistribution substrate, and an antenna substrate attached to the second redistribution substrate using an adhesive layer. The antenna substrate may include a core portion, an antenna pattern provided on a top surface of the core portion, and a wiring pattern provided on a bottom surface of the core portion.

公开(公告)号：US20230187399A1

公开(公告)日：2023-06-15

申请号：US18166869

申请日：2023-02-09

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Myungsam KANG ,  Youngchan KO ,  Jeongseok KIM ,  Kyungdon MUN

IPC: H01L23/00 ,  H01L23/498 ,  H01L23/522

CPC classification number: H01L24/14 ,  H01L24/05 ,  H01L23/49811 ,  H01L23/5226

Abstract: A semiconductor package includes a redistribution structure including an insulating layer and a redistribution layer on the insulating layer, and having a first surface and a second surface opposing the first surface, and an under-bump metal (UBM) structure including an UBM pad protruding from the first surface of the redistribution structure, and an UBM via penetrating through the insulating layer and connecting the redistribution layer and the UBM pad. A lower surface of the UBM via has a first area in contact with the UBM pad, and a second area having a step configuration relative to the first area and that extends outwardly of the first area.

公开(公告)号：US20230030562A1

公开(公告)日：2023-02-02

申请号：US17719647

申请日：2022-04-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Minwon SEO ,  Jeongseok KIM ,  Hyunsurk RYU ,  Yunjae SUH ,  Chang-Woo SHIN ,  Woonhee LEE

IPC: H04N5/243 ,  H04N5/235 ,  G06T5/00 ,  H04N5/225

Abstract: Disclosed is an electronic device which includes a dynamic vision sensor that includes a first pixel sensing a change in light intensity and generates an event signal based on the sensed change in light intensity, an illuminance estimator that estimates illuminance of a light, and a time delay compensator that calculates a time delay between a first time at which the change in light intensity occurs and a second time at which the first pixel senses the change in light intensity, based on the illuminance of the light, and to compensate for the time delay.

公开(公告)号：US20220373389A1

公开(公告)日：2022-11-24

申请号：US17729320

申请日：2022-04-26

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seol NAMGUNG ,  Jeongseok KIM ,  Yunjae SUH ,  Junseok KIM ,  Jongwoo BONG ,  Seungnam CHOI

IPC: G01J1/44

Abstract: A vision sensor and an operating method of the vision sensor are provided. The vision sensor includes a pixel array including a plurality of pixels arranged in a form of a matrix; and a bias voltage generation circuit configured to provide a test bias voltage to the pixel array, wherein each of the plurality of pixels includes a sensing circuit configured to sense light and generate a first output voltage, wherein the first output voltage changes as the test bias voltage changes within a specific frame.

公开(公告)号：US20210265251A1

公开(公告)日：2021-08-26

申请号：US17031141

申请日：2020-09-24

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kyungdon MUN ,  Myungsam KANG ,  Youngchan KO ,  Yieok KWON ,  Jeongseok KIM ,  Gongje LEE ,  Bongju CHO

IPC: H01L23/498 ,  H01L23/00 ,  H01L23/31

Abstract: A semiconductor package includes a core member having a first surface and a second surface opposing each other, and an external side surface between the first and second surfaces, the core member having a through-hole connecting the first and second surfaces, having a protruding portion that protrudes from the external side surface, and having a surface roughness (Ra) of 0.5 μm or more, a redistribution substrate on the first surface of the core member, and including a redistribution layer; a semiconductor chip in the through-hole on the redistribution substrate, and having a contact pad electrically connected to the redistribution layer, and an encapsulant on the redistribution substrate, and covering the semiconductor chip and the core member, the protruding portion of the core member having a surface exposed to a side surface of the encapsulant.