Multiple power management integrated circuits and apparatus having dual pin interface

    公开(公告)号:US11604485B2

    公开(公告)日:2023-03-14

    申请号:US17665907

    申请日:2022-02-07

    Abstract: Multiple power management integrated circuits (PMICs) may perform communication and power sequence operation coordination between the multiple PMICs through a communication interface connected to two signal lines using a dual pin interface. The multiple PMICs include a main PMIC configured to communicate with at least one application processor through a system interface and at least one sub-PMIC configured to communicate with the main PMIC through the communication interface. A first signal line uses a single bidirectional signaling scheme, and a power status signal PSTATUS is exchanged between the main PMIC and the at least one sub-PMIC through the first signal line. A second signal line uses a single unidirectional signaling scheme, and a power sequence control signal PIF is transmitted from the main PMIC to the at least one sub-PMIC through the second signal line.

    Power management device and electronic device including the same

    公开(公告)号:US09915962B2

    公开(公告)日:2018-03-13

    申请号:US15480528

    申请日:2017-04-06

    CPC classification number: G05F1/575

    Abstract: A power management device includes at least one switching regulator to generate a conversion voltage from an input voltage, a plurality of low drop-out regulators to generate a plurality of output voltages from the conversion voltage, and a controller to estimate drop-out voltages of the low drop-out regulators based on output currents of the low drop-out regulators and to dynamically control the conversion voltage based on the estimated drop-out voltages.

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