公开(公告)号：US11204864B2

公开(公告)日：2021-12-21

申请号：US16849235

申请日：2020-04-15

Applicant: Silicon Motion, Inc.

Inventor： Kuan-Yu Ke

IPC: G06F12/02 ,  G06F12/0882 ,  G06F11/30 ,  G06F13/16

Abstract: A data storage device includes a memory device and a memory controller. The memory device includes multiple memory blocks. The memory controller is coupled to the memory device and is configured to access the memory device. In a garbage collection procedure, the memory controller is configured to select multiple spare memory blocks as destination memory blocks and move valid data stored in at least one source memory block into the destination memory blocks. In the garbage collection procedure, the memory controller is further configured to determine an attribute of each valid data and determine which destination memory block to move the valid data into according to the corresponding attribute. Valid data having the same attribute is moved to the same destination memory block.

公开(公告)号：US11068177B2

公开(公告)日：2021-07-20

申请号：US16661289

申请日：2019-10-23

Applicant: Silicon Motion, Inc.

Inventor： Kuan-Yu Ke

IPC: G06F3/06 ,  G06F13/16 ,  G06F12/1009

Abstract: A data storage device includes a memory device and a memory controller. The memory device includes multiple memory blocks. The memory blocks include multiple table blocks configured to store tables and multiple data blocks configured to store data. The memory controller is configured to receive a predefined command which is a command from a host device to instruct the memory controller to perform initialization of the data storage device. The initialization of the data storage device includes a plurality of processing procedures which include a first portion of processing procedures and a second portion of processing procedures. The memory controller is configured to perform the first portion of processing procedures in response to the predefined command. After the first portion of processing procedures has been finished, the memory controller is configured to notify the host device that the data storage device is ready.

公开(公告)号：US10592412B2

公开(公告)日：2020-03-17

申请号：US16101742

申请日：2018-08-13

Applicant: Silicon Motion, Inc.

Inventor： Kuan-Yu Ke

IPC: G06F3/06 ,  G06F12/02

Abstract: A data storage device for dynamically executing the garbage-collection process is provided which includes a flash memory and a controller. The flash memory includes a plurality of blocks wherein each of the blocks includes a plurality of pages. The controller is coupled to the flash memory and is utilized to execute the garbage-collection process on the flash memory according to a number of at least one spare block in the flash memory and the number of non-spare blocks corresponding to different ratios of effective pages. The garbage-collection process is utilized for merging at least two non-spare blocks to release at least one spare block.

公开(公告)号：US20190250854A1

公开(公告)日：2019-08-15

申请号：US16027387

申请日：2018-07-05

Applicant: Silicon Motion Inc.

Inventor： Kuan-Yu Ke

IPC: G06F3/06

CPC classification number: G06F3/0659 ,  G06F3/0604 ,  G06F3/0679

Abstract: The present invention provides a system on chip (SoC), wherein the SoC comprises a first processor, a second processor and a memory. The memory stores a first parameter and a second parameter, wherein the first parameter is set by the first processor to indicate whether a specific region of the memory is locked or unlocked, and the second parameter is set by the first processor to indicate whether the specific region of the memory is locked or unlocked. In the operations of the SoC, before the first processor intends or prepares to access the specific region, the first processor refers to the second parameter to determine if the specific region is allowed to be accessed by the first processor.

公开(公告)号：US09852032B2

公开(公告)日：2017-12-26

申请号：US15660029

申请日：2017-07-26

Applicant: Silicon Motion, Inc.

Inventor： Kuan-Yu Ke

IPC: G11C5/14 ,  G06F11/14 ,  G06F3/06

CPC classification number: G06F11/1469 ,  G06F3/0619 ,  G06F3/065 ,  G06F3/0679 ,  G06F2201/84

Abstract: A data storage device is provided. The data storage device includes a flash memory and a controller. The flash memory includes a plurality of blocks. Each block includes a plurality of pages. when the data storage device is resumed from a power-off event, the controller selects a first block which was written last before the power-off event among the plurality of blocks and writes data of a plurality of first pages of the first block into a plurality of second pages of the first block.

公开(公告)号：US11860669B2

公开(公告)日：2024-01-02

申请号：US17157368

申请日：2021-01-25

Applicant: Silicon Motion, Inc.

Inventor： Kuan-Yu Ke

IPC: G06F3/06 ,  G06F11/07

CPC classification number: G06F3/064 ,  G06F3/0619 ,  G06F3/0644 ,  G06F3/0679 ,  G06F11/076

Abstract: The invention introduces a method, an apparatus and a non-transitory computer program product for storing data in flash memory. The method is performed by a processing unit when loading and executing program code of a flash translation layer to include: dividing storage space of a flash module into a first region and a second region; programming data belonging to a first partition type received from a host side into first physical blocks of the first region only; and programming data belonging to a second partition type received from the host side into the first physical blocks of the first region and the second physical blocks of the second region. With the region division and the policy for writing data into the regions in terms of data characteristics of different partition types, storage space of the flash module would be used more effective.

公开(公告)号：US11055231B2

公开(公告)日：2021-07-06

申请号：US16849214

申请日：2020-04-15

Applicant: Silicon Motion, Inc.

Inventor： Kuan-Yu Ke

IPC: G06F12/1009

Abstract: A data storage device includes a memory device and a memory controller. The memory controller selects a predetermined memory block to receive data and records multiple logical addresses in a first mapping table. When the predetermined memory block is full, the memory controller edits a second mapping table based on the first mapping table. When editing the second mapping table, the memory controller determines whether M consecutive logical addresses have been recorded in the first mapping table. When the memory controller determines that M consecutive logical addresses have been recorded in the first mapping table, the memory controller edits the second mapping table according to a data compression rate (R), such that one or more fields, which correspond to one or more logical addresses recorded in the first mapping table, of the second mapping table are skipped and not edited. M and R are positive integers greater than 1.

公开(公告)号：US10915269B2

公开(公告)日：2021-02-09

申请号：US16027387

申请日：2018-07-05

Applicant: Silicon Motion Inc.

Inventor： Kuan-Yu Ke

IPC: G06F3/06

Abstract: The present invention provides a system on chip (SoC), wherein the SoC comprises a first processor, a second processor and a memory. The memory stores a first parameter and a second parameter, wherein the first parameter is set by the first processor to indicate whether a specific region of the memory is locked or unlocked, and the second parameter is set by the first processor to indicate whether the specific region of the memory is locked or unlocked. In the operations of the SoC, before the first processor intends or prepares to access the specific region, the first processor refers to the second parameter to determine if the specific region is allowed to be accessed by the first processor.

公开(公告)号：US10776228B2

公开(公告)日：2020-09-15

申请号：US16016089

申请日：2018-06-22

Applicant: Silicon Motion, Inc.

Inventor： Kuan-Yu Ke ,  Guan-Yao Huang ,  Shen-Ting Chiu

IPC: G06F11/00 ,  G06F11/20 ,  G06F3/06 ,  G06F12/02

Abstract: A data storage device includes a flash memory, a controller and a random-access memory. The flash memory includes a plurality of planes, and each plane includes a plurality of blocks. A portion of blocks in each of the planes constitutes a super block, so that the flash memory includes a plurality of super blocks. The controller is coupled to the flash memory. When a first block of at least one first super block of the super blocks is damaged, and a second block of a second super block in the position corresponding to the damaged block is normal, the controller merges the second block of the second super block with the first super block to replace the first block. The random-access memory stores a compression table to record position information about the first block in the first super block and the number information of the second block.

公开(公告)号：US20180373433A1

公开(公告)日：2018-12-27

申请号：US16009174

申请日：2018-06-14

Applicant: Silicon Motion Inc.

Inventor： Kuan-Yu Ke

IPC: G06F3/06 ,  G06F12/02 ,  G06F11/14

Abstract: The present invention provides a method for managing a flash memory module, wherein the flash memory module includes a plurality of flash memory chips, each flash memory chip includes a plurality of first temporary blocks and a plurality of second temporary blocks, each of the first and second temporary blocks and the data blocks includes a plurality of pages, and the method includes: writing data into one of the second temporary blocks; and when an access of the flash memory module meets a specific condition, moving the data stored in the second temporary block to one of the first temporary blocks, and storing information of a first blank page of the second temporary block to the first temporary block.