公开(公告)号：US20220367633A1

公开(公告)日：2022-11-17

申请号：US17874171

申请日：2022-07-26

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chao-Shuo CHEN ,  Chia-Der CHANG ,  Yi-Jing LEE

IPC: H01L29/08 ,  H01L21/285 ,  H01L21/3065 ,  H01L21/308 ,  H01L29/06 ,  H01L29/417 ,  H01L29/66 ,  H01L29/78 ,  H01L21/762 ,  H01L21/8234 ,  H01L21/768

Abstract: The present disclosure describes a semiconductor structure and a method for forming the same. The semiconductor structure can include a substrate, an insulating stack formed over the substrate, a vertical structure formed through the insulating stack, a source/drain region formed over the vertical structure, and an isolation structure formed adjacent to the source/drain region and protruding the insulating stack. The source/drain region can include a first side surface and a second side surface. A lateral separation between the first side surface and the vertical structure can be greater than an other lateral separation between the second side surface and the vertical structure.

公开(公告)号：US20220181320A1

公开(公告)日：2022-06-09

申请号：US17678856

申请日：2022-02-23

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Yi-Jing LEE ,  Kun-Mu LI ,  Ming-Hua YU ,  Tsz-Mei KWOK

IPC: H01L27/088 ,  H01L21/8234 ,  H01L27/12 ,  H01L21/8238 ,  H01L27/092 ,  H01L21/84 ,  H01L29/78 ,  H01L29/06

Abstract: A device includes first and second semiconductor fins, first, second, third and fourth fin sidewall spacers, and first and second epitaxy structures. The first and second fin sidewall spacers are respectively on opposite sides of the first semiconductor fin. The third and fourth fin sidewall spacers are respectively on opposite sides of the second semiconductor fin. The first and third fin sidewall spacers are between the first and second semiconductor fins and have smaller heights than the second and fourth fin sidewall spacers. The first and second epitaxy structures are respectively on the first and second semiconductor fins and merged together.

公开(公告)号：US20210233906A1

公开(公告)日：2021-07-29

申请号：US16937297

申请日：2020-07-23

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chao-Shuo CHEN ,  Chia-Der CHANG ,  Yi-Jing LEE

IPC: H01L27/088 ,  H01L27/092 ,  H01L21/8234

Abstract: A semiconductor device with an isolation structure and a method of fabricating the same are disclosed. The semiconductor device includes first and second fin structures disposed on a substrate and first and second pairs of gate structures disposed on the first and second fin structures. The first end surfaces of the first pair of gate structures face second end surfaces of the second pair of gate structure. The first and second end surfaces of the first and second pair of gate structures are in physical contact with first and second sidewalls of the isolation structure, respectively. The semiconductor device further includes an isolation structure interposed between the first and second pairs of gate structures. An aspect ratio of the isolation structure is smaller than a combined aspect ratio of the first pair of gate structures.

公开(公告)号：US20200343250A1

公开(公告)日：2020-10-29

申请号：US16927751

申请日：2020-07-13

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Yi-Jing LEE ,  Tsz-Mei KWOK ,  Ming-Hua YU ,  Kun-Mu LI

IPC: H01L27/11 ,  H01L27/02 ,  H01L29/78 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/06 ,  H01L29/08

Abstract: A static random access memory (SRAM) cell includes a semiconductor fin, a first gate structure, a second gate structure, an epitaxy structure, and a first fin sidewall structure. The first gate structure crosses the semiconductor fin to form a pull-down (PD) transistor. The second gate structure crosses the semiconductor fin to form a pull-gate (PG) transistor. The epitaxy structure is on the semiconductor fin and between the first and second gate structures. The first fin sidewall structure is on a first side of the epitaxy structure and between the first and second gate structures. A method for manufacturing the semiconductor device is also disclosed.

公开(公告)号：US20190131310A1

公开(公告)日：2019-05-02

申请号：US16234283

申请日：2018-12-27

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Yi-Jing LEE ,  Tsz-Mei KWOK ,  Ming-Hua YU ,  Kun-Mu LI

IPC: H01L27/11 ,  H01L21/8238 ,  H01L29/08 ,  H01L29/06 ,  H01L29/78 ,  H01L27/02 ,  H01L27/092

Abstract: A semiconductor device includes a transistor, an isolation structure, and a fin sidewall structure. The transistor includes a fin extending from a substrate and an epitaxy structure grown on the fin. The isolation structure is above the substrate. The fin sidewall structure is above the isolation structure and is on a sidewall of the epitaxy structure. A method for manufacturing the semiconductor device is also disclosed.

公开(公告)号：US20170098648A1

公开(公告)日：2017-04-06

申请号：US14875504

申请日：2015-10-05

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Yi-Jing LEE ,  Kun-Mu LI ,  Ming-Hua YU ,  Tsz-Mei KWOK

IPC: H01L27/088 ,  H01L29/06 ,  H01L21/8234

CPC classification number: H01L27/0886 ,  H01L21/823418 ,  H01L21/823431 ,  H01L21/823468 ,  H01L29/0649

Abstract: An integrated circuit includes a first semiconductor fin, a first epitaxy structure, and at least two first dielectric fin sidewall structures. The first epitaxy structure is disposed on the first semiconductor fin. The first dielectric fin sidewall structures are disposed on opposite sidewalls of the first epitaxy structure. The first dielectric fin sidewall structures have different heights.