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公开(公告)号:US20190305218A1
公开(公告)日:2019-10-03
申请号:US15939864
申请日:2018-03-29
Inventor: HAI-DANG TRINH , HSING-LIEN LIN , FA-SHEN JIANG
IPC: H01L45/00
Abstract: A semiconductor device includes a bottom electrode, a top electrode, a switching layer and a diffusion harrier layer. The top electrode is over the bottom electrode. The switching layer is between the bottom electrode and the top electrode, and configured to store data. The diffusion barrier layer is between the bottom electrode and the switching layer to obstruct diffusion of ions between the switching layer and the bottom electrode.
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公开(公告)号:US20190123133A1
公开(公告)日:2019-04-25
申请号:US16225896
申请日:2018-12-19
Inventor: HSING-LIEN LIN , HAI-DANG TRINH , CHENG-YUAN TSAI
IPC: H01L49/02 , H01L21/768 , H01L21/8256
Abstract: A capacitive device includes: a first metal plate; a first planar dielectric layer disposed on the first metal plate; a second planar dielectric layer disposed on the first planar dielectric layer; a third planar dielectric layer disposed on the second planar dielectric layer; and a second metal plate disposed on the third planar dielectric layer; wherein the first planar dielectric layer has a first dielectric constant, the second planar dielectric layer has a second dielectric constant, and the third planar dielectric layer has a third dielectric constant, and the second dielectric constant is different from the first dielectric constant and the third dielectric constant, the second planar dielectric layer includes Tantalum pentoxide.
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