Successive approximation register analog-to-digital converter

    公开(公告)号:US10826520B1

    公开(公告)日:2020-11-03

    申请号:US16536507

    申请日:2019-08-09

    Abstract: An analog-to-digital converter includes a low voltage power supply rail, a high voltage power supply rail, successive approximation circuit, a level shifter, and a capacitive digital-to-analog converter (CDAC). The successive approximation circuitry is coupled to the low voltage power supply rail. The level shifter is coupled to the high voltage power supply rail and includes inputs coupled to first outputs of the successive approximation circuitry. The CDAC includes a first segment and a second segment. The first segment includes a first plurality of capacitors, and a first plurality of switches coupled to outputs of the level shifter. The second segment includes a second plurality of capacitors, and a second plurality of switches coupled to second outputs of the successive approximation circuitry.

    Analog to Digital (A/D) Converter with Internal Diagnostic Circuit

    公开(公告)号:US20200295773A1

    公开(公告)日:2020-09-17

    申请号:US16702090

    申请日:2019-12-03

    Abstract: An analog to digital (A/D) converter includes a capacitor array having respective first terminals selectively coupled to a reference voltage or ground via a plurality of switches and having respective second terminals coupled to a sample and hold (S/H) output. The A/D converter also includes a voltage comparator having a first input coupled to the S/H output and having a second input coupled to a bias voltage. The voltage comparator is configured to output a comparison voltage responsive to a sampled charge at the S/H output and the bias voltage. The A/D converter also includes a successive approximation register coupled to receive the comparison voltage and configured to output an approximate digital code responsive to the comparison voltage, wherein the approximate digital code is varied by controlling an equivalent capacitance of the capacitor array.

    REDUCED NOISE DYNAMIC COMPARATOR FOR A SUCCESSIVE APPROXIMATION REGISTER ANALOG-TO-DIGITAL CONVERTER

    公开(公告)号:US20190181873A1

    公开(公告)日:2019-06-13

    申请号:US15837040

    申请日:2017-12-11

    CPC classification number: H03M1/089 H03K5/2481

    Abstract: A comparator circuit includes a first transistor configured to receive a first input and a second transistor configured to receive a second input. The comparator circuit further includes a third transistor coupled to a terminal of each of the first and second transistors. The third transistor is configured to be controlled by a first control signal. A gate of a fifth transistor is coupled to a terminal of a fourth transistor at a first node and a gate of the fourth transistor is coupled to a terminal of the fifth transistor at a second node. A sixth transistor is coupled between the first and fourth transistors. A seventh transistor is coupled between the second and fifth transistors. A gate of the sixth transistor and a gate of the seventh transistor are coupled together at a fixed voltage level.

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