-
公开(公告)号:US20220182266A1
公开(公告)日:2022-06-09
申请号:US17363855
申请日:2021-06-30
Applicant: Texas Instruments Incorporated
Inventor: Ani Xavier , Jagannathan Venkataraman , Nagalinga Swamy Basayya Aremallapur , Aviral Singhal , Arun Mohan , Rakesh Chikkanayakanahalli Manjunath , Aravind Ganesan , Harshavardhan Adepu
Abstract: A receiver circuit comprising an equalizer and a method of correcting offset in the equalizer. In an example, the equalizer includes a plurality of delay stages for sampling and storing a sequence input samples, and a plurality of coefficient gain stages, each coupled to a corresponding delay stage to apply a gain corresponding to a coefficient value. The outputs of the coefficient gain stages are summed to produce a weighted sum for quantization by a slicer. Offset correction circuitry is provided, including memory storing a look-up table (LUT) for each coefficient gain stage, each storing offset correction values corresponding to the available coefficient values for the coefficient gain stage. Addressing circuitry retrieves the offset correction values for the coefficient values currently selected for each gain stage, and applies an offset correction corresponding to the sum of the retrieved offset correction values.
-
公开(公告)号:US11177986B1
公开(公告)日:2021-11-16
申请号:US17205456
申请日:2021-03-18
Applicant: Texas Instruments Incorporated
Abstract: Adaptive equalizer circuitry including both a continuous time equalizer (CTE) and a discrete time equalizer (DTE) and a method of jointly adapting the CTE and DTE in lane adaptation. Jointly adaptation of the CTE and DTE is performed by adapting the DTE at each of a plurality of filter characteristic settings of the CTE and determining a figure of merit for signals filtered by the CTE and DTE at that condition. Adaptation of the DTE may be performed by dynamically adjusting a convergence coefficient based on a history of error gradients. After a figure of merit is determined for each of the plurality of CTE filter characteristics, a CTE filter characteristic setting is then selected based on those figure of merit values, for example at a CTE setting near a midpoint of an acceptable region of figure of merit values.
-
公开(公告)号:US10930362B2
公开(公告)日:2021-02-23
申请号:US16916911
申请日:2020-06-30
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Aravind Ganesan , Jaiganesh Balakrishnan , Nagarajan Viswanathan , Yeswanth Guntupalli , Ajai Paulose , Mathews John , Jagannathan Venkataraman , Neeraj Shrivastava
Abstract: A one-time write, read-only memory for storing trimming parameters includes an address pointer table, a fixed packet portion, and a flexible packet portion. The fixed packet portion includes one or more fixed packets, each fixed packet including trimming parameters for a component identified for trimming during a design phase. The flexible packet portion includes one or more flexible packets of different types. Each flexible packet includes trimming parameters for a component identified for trimming after the design phase. One packet type includes a length section and a number of fields equal to a value stored in the length section. Each field includes an address, a trimming parameter, and a mask. Another packet type includes trimming parameters associated with operands in operating instructions for a microcontroller, where the operands include an address and a mask.
-
公开(公告)号:US20240146584A1
公开(公告)日:2024-05-02
申请号:US18049865
申请日:2022-10-26
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Aravind Ganesan , Ajai Paulose , Ankush G.P.
IPC: H04L25/03
CPC classification number: H04L25/03076
Abstract: A method for adapting a continuous time equalizer (CTE) includes determining a gain of a discrete time equalizer (DTE) and determining whether the gain has increased or decreased by more than the threshold amount. Responsive to determining that the gain has increased or decreased by more than the threshold amount, the method includes sequentially configuring the CTE for multiple CTE settings such that gain of the CTE is caused to increase or decrease in a same direction with the change in gain of the DTE. The method also includes determining a separate figure of merit (FOM) for each of the multiple CTE settings and selecting a new CTE setting from the multiple CTE settings based on the FOM for each of the multiple CTE settings.
-
公开(公告)号:US20220229961A1
公开(公告)日:2022-07-21
申请号:US17411262
申请日:2021-08-25
Applicant: Texas Instruments Incorporated
Inventor: Ajai Paulose , Aravind Ganesan , Sashidharan Venkatraman , Jaiganesh Balakrishnan
IPC: G06F30/34 , G06F16/174
Abstract: A system for programming an eFuse array in an integrated circuit (IC) includes an eFuse data file which has a first plurality of bits. The system includes a data compression module which has an input coupled to receive the eFuse data file. The data compression module reduces the size of the eFuse data file and provides a compressed data file. The compressed data file has fewer bits than the eFuse data file. The system includes an eFuse controller which has an input coupled to receive the compressed data file. The eFuse controller programs the eFuse array to permanently store the compressed data file in the eFuse array.
-
公开(公告)号:US20130222181A1
公开(公告)日:2013-08-29
申请号:US13860027
申请日:2013-04-10
Applicant: Texas Instruments Incorporated
Inventor: Jasbir Singh , Jawaharlal Tangudu , Aravind Ganesan
IPC: G01S19/24
CPC classification number: G01S19/28 , G01R31/2851 , G01S19/24 , G01S19/30 , G01S19/37
Abstract: Enhancing search capacity of Global Navigation Satellite System (GNSS) receivers. A method for searching satellite signals in a receiver includes performing a plurality of searches sequentially. The method also includes storing a result from each search of the plurality of searches in a consecutive section of a memory. Further, the method includes detecting free sections in the memory. The method also includes concatenating the free sections in the memory to yield a concatenated free section. Moreover, the method includes allocating the concatenated free section for performing an additional search.
-
-
-
-
-