公开(公告)号：US11592854B2

公开(公告)日：2023-02-28

申请号：US17364259

申请日：2021-06-30

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Avinash Shreepathi Bhat

IPC: G05F1/565

Abstract: A linear voltage regulator includes a voltage input and a voltage output. The linear voltage regulator includes a buffer having a voltage node, an input node, an output node and a control node and a power transistor having a control node coupled to the output node of the buffer, an input node coupled to the voltage input and an output node coupled to the voltage output. The linear voltage regulator includes a dropout detection module having a control node coupled to the control node of the power transistor, a voltage input node coupled to the voltage input, a voltage output node coupled to the voltage output and an output node. The linear voltage regulator includes a feedforward module having an input node coupled to the output node of the dropout detection module and an output node coupled to the control node of the buffer.

公开(公告)号：US20230324941A1

公开(公告)日：2023-10-12

申请号：US18209526

申请日：2023-06-14

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Boqiang Xiao ,  Avinash Shreepathi Bhat

IPC: G05F3/22

CPC classification number: G05F3/22

Abstract: A bandgap current reference circuit includes a bandgap core circuit and an error amplifier. The bandgap core circuit is configured to generate a zero temperature coefficient bandgap current. The bandgap core circuit includes a bipolar transistor. The bipolar transistor is configured to pass a current that is proportional to absolute temperature (PTAT current). The error amplifier is coupled to the bandgap core circuit and includes a bipolar differential input pair. The bipolar differential input pair is configured to ensure that the PTAT current is flowing in the bipolar transistor.

公开(公告)号：US11507120B2

公开(公告)日：2022-11-22

申请号：US17016840

申请日：2020-09-10

Applicant: Texas Instruments Incorporated

Inventor： Avinash Shreepathi Bhat

IPC: G05F1/575 ,  G05F1/565

Abstract: In a linear regulator system, a pass element has a control terminal, an input terminal and an output terminal. The pass element is configured to provide an output voltage at the output terminal based on: an input voltage at the input terminal; and a control signal at the control terminal. A dropout error amplifier has an error output and first and second inputs. The first input is coupled to the output terminal, and the error output is coupled to the control terminal. The dropout error amplifier is configured to provide a dropout control signal at the error output based on a comparison between: the output voltage at the first input; and a dropout reference voltage at the second input. The pass element is configured to regulate the output voltage at the dropout reference voltage, responsive to the dropout control signal.

公开(公告)号：US11139801B2

公开(公告)日：2021-10-05

申请号：US17034157

申请日：2020-09-28

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Avinash Shreepathi Bhat

IPC: H03K5/24 ,  H03K3/012 ,  A61N1/08 ,  A61N1/378 ,  H03K17/687 ,  G06F1/24 ,  A61N1/362

Abstract: A power-on reset (POR) circuit includes first, second and third resistors. A first transistor has a first control terminal and first and second voltage terminals. A second transistor has a second control terminal and third and fourth voltage terminals. A third transistor has a third control terminal and fifth and sixth voltage terminals. The first control terminal is coupled via the first resistor to the second voltage terminal. The third voltage terminal is coupled via the second resistor to the first voltage terminal. The second control terminal is coupled via the third resistor to the fourth voltage terminal. The third control terminal is coupled to the third voltage terminal. The fifth voltage terminal is coupled to the first control terminal. A voltage buffer is coupled to the fifth voltage terminal.

公开(公告)号：US10790806B2

公开(公告)日：2020-09-29

申请号：US16278575

申请日：2019-02-18

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Avinash Shreepathi Bhat

IPC: H03L7/00 ,  H03K3/012 ,  H03K5/24 ,  A61N1/08 ,  A61N1/378 ,  H03K17/687 ,  A61N1/362

Abstract: In one example, a power-on reset (POR) circuit comprises a first transistor coupled to a voltage source, a control terminal of the first transistor coupled to a non-control terminal of the first transistor via a resistor; a second transistor coupled to the resistor, a control terminal of the second transistor is coupled to a non-control terminal of the second transistor; and a comparator having first and second terminals, the first terminal coupled to the non-control terminal of the first transistor and the second terminal coupled to the voltage source via an offset circuit.