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公开(公告)号：US20200228059A1
公开(公告)日：2020-07-16
申请号：US16248850
申请日：2019-01-16
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Eleazar Walter Kenyon
IPC: H03B5/12
Abstract: An LC oscillator architecture in which an LC tank is driven by a negative resistance element (amplifier) including first and second Vbe/Vgs multipliers cross-coupled to the LC tank. Each Vbe/Vgs multiplier circuitry including a transistor with a control terminal as a negative input, a reference terminal as a positive input, and an output terminal, a shunt resistance connected between the control terminal and the reference terminal, a series resistance connected between the control terminal and the output terminal for one of the same transistor or the other transistor, and a shorting capacitance connected between the control terminal of the transistor, and the output terminal of the transistor of the other Vbe/Vgs multiplier. An example application is an LC VCO, such as for a PLL, CDR, or retimer.
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公开(公告)号：US10395070B2
公开(公告)日：2019-08-27
申请号：US15808607
申请日：2017-11-09
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Eleazar Walter Kenyon
Abstract: A peak detector circuit includes a first capacitor coupled to an inverter and a first switch in parallel with the inverter. An input of the inverter couples to second and third switches. The second switch couples to an input voltage node. The third switch couples to an output voltage node of the peak detector circuit. The peak detector circuit includes a second capacitor coupled to the third switch and a third capacitor coupled to the second capacitor by way of a fourth switch. The third capacitor couples via a fifth switch to a power supply voltage node or a ground. A periodic control signal causes the first, second, and third switches to repeatedly open and close and a second control signal causes the fourth and fifth switches to open and close to adjust an output voltage on the output voltage node towards an input voltage on the input voltage node.
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