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11.
公开(公告)号:US10761968B2
公开(公告)日:2020-09-01
申请号:US15981377
申请日:2018-05-16
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Jason Lynn Peck , Gary A. Cooper , Markus Koesler
Abstract: A real-time debugger implementation maintains and manages multiple debug contexts allowing developers to interact with real-time applications without “breaking” the system in which the debug application is executing. The debugger allows multiple debug contexts to exist and allows break points in real-time and non-real-time code portions of one or more applications executing on a debug enabled core of a processor. A debug monitor function may be implemented as a hardware logic module on the same integrated circuit as the processor. Higher priority interrupt service requests may be serviced while otherwise maintaining a context for the debug session (e.g., stopped at a developer defined breakpoint). Accordingly, the application developer executing the debugger may not have to be concerned with processing occurring on the processor that may be unrelated to the current debug session.
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12.
公开(公告)号:US10761967B2
公开(公告)日:2020-09-01
申请号:US15981320
申请日:2018-05-16
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Jason Lynn Peck , Gary A. Cooper , Markus Koesler
Abstract: A real-time debugger implementation maintains and manages multiple debug contexts allowing developers to interact with real-time applications without “breaking” the system in which the debug application is executing. The debugger allows multiple debug contexts to exist and allows break points in real-time and non-real-time code portions of one or more applications executing on a debug enabled core of a processor. A debug monitor function may be implemented as a hardware logic module on the same integrated circuit as the processor. Higher priority interrupt service requests may be serviced while otherwise maintaining a context for the debug session (e.g., stopped at a developer defined breakpoint). Accordingly, the application developer executing the debugger may not have to be concerned with processing occurring on the processor that may be unrelated to the current debug session.
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公开(公告)号:US20190303166A1
公开(公告)日:2019-10-03
申请号:US16378832
申请日:2019-04-09
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Markus Koesler , Johann Zipperer , Christian Wiencke , Wolfgang Lutsch
IPC: G06F9/38 , G06F11/267 , G06F11/36 , G06F9/30
Abstract: A semiconductor device comprising a processor having a pipelined architecture and a pipeline flattener and a method for operating a pipeline flattener in a semiconductor device are provided. The processor comprises a pipeline having a plurality of pipeline stages and a plurality of pipeline registers that are coupled between the pipeline stages. The pipeline flattener comprises a plurality of trigger registers for storing a trigger, wherein the trigger registers are coupled between the pipeline stages.
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