公开(公告)号：US12210439B2

公开(公告)日：2025-01-28

申请号：US17693085

申请日：2022-03-11

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Jason Lynn Peck ,  Gary A. Cooper ,  Markus Koesler

IPC: G06F11/36

Abstract: A real-time debugger implementation maintains and manages multiple debug contexts allowing developers to interact with real-time applications without “breaking” the system in which the debug application is executing. The debugger allows multiple debug contexts to exist and allows break points in real-time and non-real-time code portions of one or more applications executing on a debug enabled core of a processor. A debug monitor function may be implemented as a hardware logic module on the same integrated circuit as the processor. Higher priority interrupt service requests may be serviced while otherwise maintaining a context for the debug session (e.g., stopped at a developer defined breakpoint). Accordingly, the application developer executing the debugger may not have to be concerned with processing occurring on the processor that may be unrelated to the current debug session.

公开(公告)号：US11294794B2

公开(公告)日：2022-04-05

申请号：US17008418

申请日：2020-08-31

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Jason Lynn Peck ,  Gary A. Cooper ,  Markus Koesler

IPC: G06F11/36

Abstract: A real-time debugger implementation maintains and manages multiple debug contexts allowing developers to interact with real-time applications without “breaking” the system in which the debug application is executing. The debugger allows multiple debug contexts to exist and allows break points in real-time and non-real-time code portions of one or more applications executing on a debug enabled core of a processor. A debug monitor function may be implemented as a hardware logic module on the same integrated circuit as the processor. Higher priority interrupt service requests may be serviced while otherwise maintaining a context for the debug session (e.g., stopped at a developer defined breakpoint). Accordingly, the application developer executing the debugger may not have to be concerned with processing occurring on the processor that may be unrelated to the current debug session.

公开(公告)号：US20210004236A1

公开(公告)日：2021-01-07

申请号：US17029299

申请日：2020-09-23

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Markus Koesler ,  Johann Zipperer ,  Christian Wiencke ,  Wolfgang Lutsch

IPC: G06F9/38 ,  G06F11/36 ,  G06F11/267 ,  G06F9/30

Abstract: A semiconductor device comprising a processor having a pipelined architecture and a pipeline flattener and a method for operating a pipeline flattener in a semiconductor device are provided. The processor comprises a pipeline having a plurality of pipeline stages and a plurality of pipeline registers that are coupled between the pipeline stages. The pipeline flattener comprises a plurality of trigger registers for storing a trigger, wherein the trigger registers are coupled between the pipeline stages.

公开(公告)号：US11307965B2

公开(公告)日：2022-04-19

申请号：US17011829

申请日：2020-09-03

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Jason Lynn Peck ,  Gary A. Cooper ,  Markus Koesler

IPC: G06F11/36 ,  G06F9/48

Abstract: A real-time debugger implementation maintains and manages multiple debug contexts allowing developers to interact with real-time applications without “breaking” the system in which the debug application is executing. The debugger allows multiple debug contexts to exist and allows break points in real-time and non-real-time code portions of one or more applications executing on a debug enabled core of a processor. A debug monitor function may be implemented as a hardware logic module on the same integrated circuit as the processor. Higher priority interrupt service requests may be serviced while otherwise maintaining a context for the debug session (e.g., stopped at a developer defined breakpoint). Accordingly, the application developer executing the debugger may not have to be concerned with processing occurring on the processor that may be unrelated to the current debug session.

公开(公告)号：US10769050B2

公开(公告)日：2020-09-08

申请号：US15981258

申请日：2018-05-16

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Jason Lynn Peck ,  Gary A. Cooper ,  Markus Koesler

IPC: G06F9/44 ,  G06F11/36 ,  G06F9/48

Abstract: A real-time debugger implementation maintains and manages multiple debug contexts allowing developers to interact with real-time applications without “breaking” the system in which the debug application is executing. The debugger allows multiple debug contexts to exist and allows break points in real-time and non-real-time code portions of one or more applications executing on a debug enabled core of a processor. A debug monitor function may be implemented as a hardware logic module on the same integrated circuit as the processor. Higher priority interrupt service requests may be serviced while otherwise maintaining a context for the debug session (e.g., stopped at a developer defined breakpoint). Accordingly, the application developer executing the debugger may not have to be concerned with processing occurring on the processor that may be unrelated to the current debug session.

公开(公告)号：US12153509B2

公开(公告)日：2024-11-26

申请号：US17722464

申请日：2022-04-18

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Jason Lynn Peck ,  Gary A. Cooper ,  Markus Koesler

IPC: G06F11/36 ,  G06F9/48

Abstract: A real-time debugger implementation maintains and manages multiple debug contexts allowing developers to interact with real-time applications without “breaking” the system in which the debug application is executing. The debugger allows multiple debug contexts to exist and allows break points in real-time and non-real-time code portions of one or more applications executing on a debug enabled core of a processor. A debug monitor function may be implemented as a hardware logic module on the same integrated circuit as the processor. Higher priority interrupt service requests may be serviced while otherwise maintaining a context for the debug session (e.g., stopped at a developer defined breakpoint). Accordingly, the application developer executing the debugger may not have to be concerned with processing occurring on the processor that may be unrelated to the current debug session.

公开(公告)号：US12038826B2

公开(公告)日：2024-07-16

申请号：US17538498

申请日：2021-11-30

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Jason Lynn Peck ,  Gary A. Cooper ,  Markus Koesler

IPC: G06F11/36

CPC classification number: G06F11/3656 ,  G06F11/3636 ,  G06F11/3664

Abstract: A real-time debugger implementation maintains and manages multiple debug contexts allowing developers to interact with real-time applications without “breaking” the system in which the debug application is executing. The debugger allows multiple debug contexts to exist and allows break points in real-time and non-real-time code portions of one or more applications executing on a debug enabled core of a processor. A debug monitor function may be implemented as a hardware logic module on the same integrated circuit as the processor. Higher priority interrupt service requests may be serviced while otherwise maintaining a context for the debug session (e.g., stopped at a developer defined breakpoint). Accordingly, the application developer executing the debugger may not have to be concerned with processing occurring on the processor that may be unrelated to the current debug session.

公开(公告)号：US11513804B2

公开(公告)日：2022-11-29

申请号：US17029299

申请日：2020-09-23

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Markus Koesler ,  Johann Zipperer ,  Christian Wiencke ,  Wolfgang Lutsch

IPC: G06F11/36 ,  G06F9/38 ,  G06F11/267 ,  G06F9/30

Abstract: A semiconductor device comprising a processor having a pipelined architecture and a pipeline flattener and a method for operating a pipeline flattener in a semiconductor device are provided. The processor comprises a pipeline having a plurality of pipeline stages and a plurality of pipeline registers that are coupled between the pipeline stages. The pipeline flattener comprises a plurality of trigger registers for storing a trigger, wherein the trigger registers are coupled between the pipeline stages.

公开(公告)号：US11216356B2

公开(公告)日：2022-01-04

申请号：US17008321

申请日：2020-08-31

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Jason Lynn Peck ,  Gary A. Cooper ,  Markus Koesler

IPC: G06F11/36

Abstract: A real-time debugger implementation maintains and manages multiple debug contexts allowing developers to interact with real-time applications without “breaking” the system in which the debug application is executing. The debugger allows multiple debug contexts to exist and allows break points in real-time and non-real-time code portions of one or more applications executing on a debug enabled core of a processor. A debug monitor function may be implemented as a hardware logic module on the same integrated circuit as the processor. Higher priority interrupt service requests may be serviced while otherwise maintaining a context for the debug session (e.g., stopped at a developer defined breakpoint). Accordingly, the application developer executing the debugger may not have to be concerned with processing occurring on the processor that may be unrelated to the current debug session.

公开(公告)号：US10795685B2

公开(公告)日：2020-10-06

申请号：US16378832

申请日：2019-04-09

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Markus Koesler ,  Johann Zipperer ,  Christian Wiencke ,  Wolfgang Lutsch

IPC: G06F9/38 ,  G06F11/36 ,  G06F11/267 ,  G06F9/30

Abstract: A semiconductor device comprising a processor having a pipelined architecture and a pipeline flattener and a method for operating a pipeline flattener in a semiconductor device are provided. The processor comprises a pipeline having a plurality of pipeline stages and a plurality of pipeline registers that are coupled between the pipeline stages. The pipeline flattener comprises a plurality of trigger registers for storing a trigger, wherein the trigger registers are coupled between the pipeline stages.