Ramp generator for multilevel class-D amplifiers

    公开(公告)号:US10965279B2

    公开(公告)日:2021-03-30

    申请号:US16360927

    申请日:2019-03-21

    Abstract: A multi-level ramp generator comprises three ramp generators. The first ramp generator generates a first ramp signal, comprising a sawtooth voltage waveform with a first common mode voltage and a first peak to peak voltage. The second ramp generator generates a second ramp signal, comprising a sawtooth voltage waveform with a second common mode voltage and a second peak-to-peak voltage. The third ramp generator generates a third ramp signal, comprising a sawtooth voltage waveform with a third common mode voltage and the second peak-to-peak voltage. The second and third ramp signals are in phase with each other and the first ramp signal is 180° out of phase with the second and third ramp signals. In some implementations, each of the first, second, and third ramp generators comprise a respective delay locked loop and a respective voltage controlled oscillator.

    Switching amplifier having linear transition totem pole modulation

    公开(公告)号:US12034420B2

    公开(公告)日:2024-07-09

    申请号:US17491133

    申请日:2021-09-30

    CPC classification number: H03G3/34 H03F3/217 H03F2200/03

    Abstract: A switching amplifier includes a first portion of a power stage; a second portion of a power stage; a pulse-width modulation (PWM) control loop coupled to control inputs of the first portion of the power stage; and a linear amplifier coupled to control inputs of the second portion of the power stage. The PWM control loop controls a first switch and a second switch of the first portion of the power stage. Between current terminals of the first switch and the second switch is a first signal output of the switching amplifier. The linear amplifier controls a third switch and a fourth switch of the second portion of the power stage. Between current terminals of the third switch and the fourth switch is a second signal output of the switching amplifier.

    METHODS AND APPARATUS TO GENERATE A MODULATION PROTOCOL TO OUTPUT AUDIO

    公开(公告)号:US20230049670A1

    公开(公告)日:2023-02-16

    申请号:US17402264

    申请日:2021-08-13

    Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed to generate a modulation protocol to output audio. An example apparatus includes a modulation circuit including a first input, a second input, a first output, and a second output; a first gate coupled to the first output of the modulation circuit; a second gate coupled to the second output of the modulation circuit; a first multiplexer including a first input coupled to the first output of the modulation circuit, a second input coupled to the output of the second gate, and an output coupled to a first switch; and a second multiplexer including a first input coupled to the second output of the modulation circuit, a second input coupled to the output of the first gate, and an output coupled to a second switch.

    FOLDED RAMP GENERATOR
    14.
    发明申请

    公开(公告)号:US20220302908A1

    公开(公告)日:2022-09-22

    申请号:US17832280

    申请日:2022-06-03

    Abstract: A device includes a first ramp generator having a first ramp generator output configured to provide a first ramp, a second ramp generator having a second ramp generator output configured to provide a second ramp, and a third ramp generator having a third ramp generator output configured to provide a third ramp. The first ramp is a sawtooth voltage waveform having a first common mode voltage and a first peak-to-peak voltage. The second ramp is a sawtooth voltage waveform having a second common mode voltage and a second peak-to-peak voltage. The third ramp is a sawtooth voltage waveform having a third common mode voltage and a third peak-to-peak voltage. A frequency of the second ramp is approximately equal to a frequency of the third ramp, and the frequency of the third ramp is approximately double a frequency of the first ramp.

    Closed Loop Control for Piezoelectric-Based Power Converters

    公开(公告)号:US20210399638A1

    公开(公告)日:2021-12-23

    申请号:US17348122

    申请日:2021-06-15

    Abstract: A power converter including a piezoelectric resonator. The power converter includes a first transistor coupled between an input terminal and a first plate of the piezoelectric resonator, and a second transistor coupled between the first plate of the piezoelectric resonator and an output terminal. A load may be coupled at the output terminal. Controller circuitry has inputs coupled to the input node, the output node, and to the first plate of the piezoelectric resonator, and outputs coupled to control terminals of the first and second transistors. The controller circuitry operates to turn on the first transistor responsive to a comparison of voltages at the first plate and the input terminal, turn on the second transistor responsive to a comparison of voltages at the first plate and the output terminal, and turn off one of the first and second transistors responsive to an output level at the output terminal.

    Multilevel class-D power stage including a capacitive charge pump

    公开(公告)号:US10886881B2

    公开(公告)日:2021-01-05

    申请号:US16360703

    申请日:2019-03-21

    Abstract: An amplifier comprises eight transistors: the first coupled to a linked node and to a positive output node, the second coupled to the linked node and to a negative output node, the third coupled to the positive output node and a common potential, the fourth coupled to the negative output node and the common potential, the fifth coupled to a battery node, the sixth coupled to the fifth transistor and to the positive output node, the seventh coupled to the battery node, and the eighth coupled to the seventh transistor and to the negative output node. The amplifier also includes a charge pump to convert the battery voltage to an increased voltage on the linked node. The charge pump includes capacitors and operates at a lower frequency in lower power mode and a higher frequency in higher power mode to increase power provided to the linked node.

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