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公开(公告)号:US20240387533A1
公开(公告)日:2024-11-21
申请号:US18787766
申请日:2024-07-29
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Jiun-Ming Kuo , Pei-Ling Gao , Chen-Hsuan Liao , Hung-Ju Chou , Chih-Chung Chang , Che-Yuan Hsu
IPC: H01L27/088 , H01L21/8234 , H01L29/06
Abstract: Semiconductor devices and methods of forming the same are provided. In an embodiment, a semiconductor device includes a first fin extending along a first direction, a second fin extending parallel to the first fin, and a gate structure over and wrapping around the first fin and the second fin, the gate structure extending along a second direction perpendicular to the first direction. The first fin bents away from the second fin along the second direction and the second fin bents away from the first fin along the second direction.
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公开(公告)号:US20230387213A1
公开(公告)日:2023-11-30
申请号:US18447149
申请日:2023-08-09
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Yu-Shan Lu , Hung-Ju Chou , Pei-Ling Gao , Chen-Hsuan Liao , Chih-Chung Chang , Jiun-Ming Kuo , Che-Yuan Hsu
IPC: H01L29/16 , H01L29/66 , H01L21/8238 , H01L27/092 , H01L29/78
CPC classification number: H01L29/16 , H01L29/66795 , H01L21/823821 , H01L27/0924 , H01L29/785
Abstract: A semiconductor structure includes a SiGe fin protruding from a substrate, where the SiGe fin includes a top portion having a first sidewall and a second sidewall and a bottom portion having a third sidewall and a fourth sidewall, and where a first transition region connecting the first sidewall to the third sidewall and a second transition region connecting the second sidewall to the fourth sidewall each have a tapered profile extending away from the first sidewall and the second sidewall, respectively, and a Si-containing layer disposed on the top portion of the SiGe fin, where a portion of the Si-containing layer on the first transition region extends away from the first sidewall by a first lateral distance and a portion of the Si-containing layer on the second transition region extends away from the second sidewall by a second lateral distance that is different from the first lateral distance.
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公开(公告)号:US11705372B2
公开(公告)日:2023-07-18
申请号:US16787906
申请日:2020-02-11
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor: Hung-Ju Chou , Chih-Chung Chang , Jiun-Ming Kuo , Che-Yuan Hsu , Pei-Ling Gao , Chen-Hsuan Liao
IPC: H01L21/8238 , H01L27/092 , H01L29/06 , H01L29/161 , H01L21/02 , H01L29/04 , H01L29/10 , H01L21/3065
CPC classification number: H01L21/823807 , H01L21/02532 , H01L21/02609 , H01L21/3065 , H01L21/823821 , H01L21/823878 , H01L21/823892 , H01L27/0924 , H01L27/0928 , H01L29/045 , H01L29/0653 , H01L29/1054 , H01L29/1083 , H01L29/161
Abstract: The embodiments described herein are directed to a method for reducing fin oxidation during the formation of fin isolation regions. The method includes providing a semiconductor substrate with an n-doped region and a p-doped region formed on a top portion of the semiconductor substrate; epitaxially growing a first layer on the p-doped region; epitaxially growing a second layer different from the first layer on the n-doped region; epitaxially growing a third layer on top surfaces of the first and second layers, where the third layer is thinner than the first and second layers. The method further includes etching the first, second, and third layers to form fin structures on the semiconductor substrate and forming an isolation region between the fin structures.
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公开(公告)号:US20220328627A1
公开(公告)日:2022-10-13
申请号:US17402930
申请日:2021-08-16
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Jen-Hong Chang , Yi-Hsiu Liu , You-Ting Lin , Chih-Chung Chang , Kuo-Yi Chao , Jiun-Ming Kuo , Yuan-Ching Peng , Sung-En Lin , Chia-Cheng Chao , Chung-Ting Ko
IPC: H01L29/06 , H01L29/786 , H01L21/768
Abstract: A semiconductor device includes a first channel region, a second channel region, and a first insulating fin, the first insulating fin being interposed between the first channel region and the second channel region. The first insulating fin includes a lower portion and an upper portion. The lower portion includes a fill material. The upper portion includes a first dielectric layer on the lower portion, the first dielectric layer being a first dielectric material, a first capping layer on the first dielectric layer, the first capping layer being a second dielectric material, the second dielectric material being different than the first dielectric material, and a second dielectric layer on the first capping layer, the second dielectric layer being the first dielectric material.
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公开(公告)号:US20210257360A1
公开(公告)日:2021-08-19
申请号:US17021251
申请日:2020-09-15
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Jiun-Ming Kuo , Pei-Ling Gao , Chen-Hsuan Liao , Hung-Ju Chou , Chih-Chung Chang , Che-Yuan Hsu
IPC: H01L27/088 , H01L29/06 , H01L21/8234
Abstract: Semiconductor devices and methods of forming the same are provided. In an embodiment, a semiconductor device includes a first fin extending along a first direction, a second fin extending parallel to the first fin, and a gate structure over and wrapping around the first fin and the second fin, the gate structure extending along a second direction perpendicular to the first direction. The first fin bents away from the second fin along the second direction and the second fin bents away from the first fin along the second direction.
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