公开(公告)号：US10673453B1

公开(公告)日：2020-06-02

申请号：US16517796

申请日：2019-07-22

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Visvesvaraya Appala Pentakota ,  Rishi Soundararajan ,  Shagun Dusad ,  Chirag Chandrahas Shetty

IPC: H03M1/38 ,  H03K5/24 ,  H03K19/20 ,  H03M1/12 ,  H03M1/00 ,  H03M1/14

Abstract: An analog-to-digital converter has a logic gate for generating an output signal having a delay corresponding to a delay between input signals. The logic gate includes inputs for receiving the input signals, and an output for outputting the output signal. A delay comparator generates a digital signal representative of the order of the input signals, and generates a delay signal having a delay corresponding to the delay between the input signals. The delay comparator has inputs for receiving the input signals, a digital output for outputting the digital signal, and a delay output for outputting the delay signal. A delay-based analog-to-digital converter, with a front stage and successive residual stages, is also disclosed. A delay comparator having merged comparator, sign-out, and delay-out circuits, and which may be operated within one of successive stages, without a clock, is also disclosed.