公开(公告)号：US11546640B2

公开(公告)日：2023-01-03

申请号：US17151699

申请日：2021-01-19

Applicant: Texas Instruments Incorporated

Inventor： Mangesh Devidas Sadafale

IPC: H04N19/86 ,  H04N19/176 ,  H04N19/134 ,  H04N19/117 ,  H04N19/186

Abstract: Several systems, methods and integrated circuits capable of reducing blocking artifacts in video data are disclosed. In an embodiment, a system for reducing blocking artifacts in video data includes a processing module and a deblocking module. The deblocking module comprises a luma deblocking filter and a chroma deblocking filter configured to filter an edge between adjacent blocks associated with the video data, where a block of the adjacent blocks corresponds to one of a prediction block and a transform block. The processing module is communicatively associated with the deblocking module and is operable to configure at least one filter coefficient corresponding to the chroma deblocking filter based on one or more filter coefficients corresponding to the luma deblocking filter. The processing module is further configured to cause the chroma deblocking filter to filter the edge between the adjacent blocks based on the configured at least one filter coefficient.

公开(公告)号：US20210037263A1

公开(公告)日：2021-02-04

申请号：US17074308

申请日：2020-10-19

Applicant: Texas Instruments Incorporated

Inventor： Mangesh Devidas Sadafale ,  Minhua Zhou

IPC: H04N19/86 ,  H04N19/176 ,  H04N19/117 ,  H04N19/157 ,  H04N19/436

Abstract: Deblocking filtering is provided in which an 8×8 filtering block covering eight sample vertical and horizontal boundary segments is divided into filtering sub-blocks that can be independently processed. To process the vertical boundary segment, the filtering block is divided into top and bottom 8×4 filtering sub-blocks, each covering a respective top and bottom half of the vertical boundary segment. To process the horizontal boundary segment, the filtering block is divided into left and right 4×8 filtering sub-blocks, each covering a respective left and right half of the horizontal boundary segment. The computation of the deviation d for a boundary segment in a filtering sub-block is performed using only samples from rows or columns in the filtering sub-block. Consequently, the filter on/off decisions and the weak/strong filtering decisions of the deblocking filtering are performed using samples contained within individual filtering blocks, thus allowing full parallel processing of the filtering blocks.

公开(公告)号：US20210144411A1

公开(公告)日：2021-05-13

申请号：US17151699

申请日：2021-01-19

Applicant: Texas Instruments Incorporated

Inventor： Mangesh Devidas Sadafale

IPC: H04N19/86 ,  H04N19/176 ,  H04N19/134 ,  H04N19/117 ,  H04N19/186

Abstract: Several systems, methods and integrated circuits capable of reducing blocking artifacts in video data are disclosed. In an embodiment, a system for reducing blocking artifacts in video data includes a processing module and a deblocking module. The deblocking module comprises a luma deblocking filter and a chroma deblocking filter configured to filter an edge between adjacent blocks associated with the video data, where a block of the adjacent blocks corresponds to one of a prediction block and a transform block. The processing module is communicatively associated with the deblocking module and is operable to configure at least one filter coefficient corresponding to the chroma deblocking filter based on one or more filter coefficients corresponding to the luma deblocking filter. The processing module is further configured to cause the chroma deblocking filter to filter the edge between the adjacent blocks based on the configured at least one filter coefficient.

公开(公告)号：US10931973B2

公开(公告)日：2021-02-23

申请号：US14702903

申请日：2015-05-04

Applicant: Texas Instruments Incorporated

Inventor： Mangesh Devidas Sadafale

IPC: H04N19/86 ,  H04N19/176 ,  H04N19/134 ,  H04N19/117 ,  H04N19/186

Abstract: Several systems, methods and integrated circuits capable of reducing blocking artifacts in video data are disclosed. In an embodiment, a system for reducing blocking artifacts in video data includes a processing module and a deblocking module. The deblocking module comprises a luma deblocking filter and a chroma deblocking filter configured to filter an edge between adjacent blocks associated with the video data, where a block of the adjacent blocks corresponds to one of a prediction block and a transform block. The processing module is communicatively associated with the deblocking module and is operable to configure at least one filter coefficient corresponding to the chroma deblocking filter based on one or more filter coefficients corresponding to the luma deblocking filter. The processing module is further configured to cause the chroma deblocking filter to filter the edge between the adjacent blocks based on the configured at least one filter coefficient.

公开(公告)号：US20200228845A1

公开(公告)日：2020-07-16

申请号：US16831084

申请日：2020-03-26

Applicant: Texas Instruments Incorporated

Inventor： Mangesh Devidas Sadafale

IPC: H04N19/86 ,  H04N19/159 ,  H04N19/176 ,  H04N19/117 ,  H04N19/14 ,  H04N19/80

Abstract: Several methods and systems for reducing blocking artifacts are disclosed. In an embodiment, the method includes receiving a pair of adjacent blocks having an edge being positioned between the adjacent blocks. The pair of adjacent blocks is associated with one or more coding blocks. The one or more coding blocks comprise one or more coding information associated with the coding of the pair of adjacent blocks. The method also includes conducting a determination of whether the pair of adjacent blocks is coded in a skip-mode based on the one or more coding information. The edge is filtered based on the determination. Filtering the edge comprises disabling a de-blocking filtering of the edge based on a determination that the pair of adjacent blocks is coded in the skip-mode; and enabling the de-blocking filtering of the edge based on determination that the pair of adjacent blocks is not associated with the skip-mode.

公开(公告)号：US20180227598A1

公开(公告)日：2018-08-09

申请号：US15948832

申请日：2018-04-09

Applicant: Texas Instruments Incorporated

Inventor： Mangesh Devidas Sadafale

IPC: H04N19/86 ,  H04N19/117 ,  H04N19/80 ,  H04N19/159 ,  H04N19/176 ,  H04N19/14

CPC classification number: H04N19/86 ,  H04N19/117 ,  H04N19/14 ,  H04N19/159 ,  H04N19/176 ,  H04N19/80

Abstract: Several methods and systems for reducing blocking artifacts are disclosed. In an embodiment, the method includes receiving a pair of adjacent blocks having an edge being positioned between the adjacent blocks. The pair of adjacent blocks is associated with one or more coding blocks. The one or more coding blocks comprise one or more coding information associated with the coding of the pair of adjacent blocks. The method also includes conducting a determination of whether the pair of adjacent blocks is coded in a skip-mode based on the one or more coding information. The edge is filtered based on the determination. Filtering the edge comprises disabling a de-blocking filtering of the edge based on a determination that the pair of adjacent blocks is coded in the skip-mode; and enabling the de-blocking filtering of the edge based on determination that the pair of adjacent blocks is not associated with the skip-mode.

公开(公告)号：US20180014035A1

公开(公告)日：2018-01-11

申请号：US15700541

申请日：2017-09-11

Applicant: Texas Instruments Incorporated

Inventor： Mangesh Devidas Sadafale ,  Minhua Zhou

IPC: H04N19/86 ,  H04N19/176 ,  H04N19/157 ,  H04N19/436 ,  H04N19/117

CPC classification number: H04N19/86 ,  H04N19/117 ,  H04N19/157 ,  H04N19/176 ,  H04N19/436

Abstract: Deblocking filtering is provided in which an 8×8 filtering block covering eight sample vertical and horizontal boundary segments is divided into filtering sub-blocks that can be independently processed. To process the vertical boundary segment, the filtering block is divided into top and bottom 8×4 filtering sub-blocks, each covering a respective top and bottom half of the vertical boundary segment. To process the horizontal boundary segment, the filtering block is divided into left and right 4×8 filtering sub-blocks, each covering a respective left and right half of the horizontal boundary segment. The computation of the deviation d for a boundary segment in a filtering sub-block is performed using only samples from rows or columns in the filtering sub-block. Consequently, the filter on/off decisions and the weak/strong filtering decisions of the deblocking filtering are performed using samples contained within individual filtering blocks, thus allowing full parallel processing of the filtering blocks.

公开(公告)号：US20150237380A1

公开(公告)日：2015-08-20

申请号：US14702903

申请日：2015-05-04

Applicant: Texas Instruments Incorporated

Inventor： Mangesh Devidas Sadafale

IPC: H04N19/86 ,  H04N19/117 ,  H04N19/186 ,  H04N19/176

CPC classification number: H04N19/86 ,  H04N19/117 ,  H04N19/134 ,  H04N19/176 ,  H04N19/186

Abstract: Several systems, methods and integrated circuits capable of reducing blocking artifacts in video data are disclosed. In an embodiment, a system for reducing blocking artifacts in video data includes a processing module and a deblocking module. The deblocking module comprises a luma deblocking filter and a chroma deblocking filter configured to filter an edge between adjacent blocks associated with the video data, where a block of the adjacent blocks corresponds to one of a prediction block and a transform block. The processing module is communicatively associated with the deblocking module and is operable to configure at least one filter coefficient corresponding to the chroma deblocking filter based on one or more filter coefficients corresponding to the luma deblocking filter. The processing module is further configured to cause the chroma deblocking filter to filter the edge between the adjacent blocks based on the configured at least one filter coefficient.

Abstract translation: 公开了能够减少视频数据中的块伪影的若干系统，方法和集成电路。 在一个实施例中，用于减少视频数据中的块伪影的系统包括处理模块和去块模块。 去块模块包括亮度去块滤波器和色度去块滤波器，其被配置为对与视频数据相关联的相邻块之间的边缘进行滤波，其中相邻块的块对应于预测块和变换块中的一个。 处理模块与去块模块通信地关联，并且可操作以基于与亮度去块滤波器对应的一个或多个滤波器系数来配置对应于色度去块滤波器的至少一个滤波器系数。 处理模块还被配置为基于配置的至少一个滤波器系数使色度去块滤波器对相邻块之间的边缘进行滤波。