公开(公告)号：US12149749B2

公开(公告)日：2024-11-19

申请号：US18071863

申请日：2022-11-30

Applicant: Texas Instruments Incorporated

Inventor： Mangesh Devidas Sadafale

IPC: H04N19/86 ,  H04N19/117 ,  H04N19/134 ,  H04N19/176 ,  H04N19/186

Abstract: Several systems, methods and integrated circuits capable of reducing blocking artifacts in video data are disclosed. In an embodiment, a system for reducing blocking artifacts in video data includes a processing module and a deblocking module. The deblocking module comprises a luma deblocking filter and a chroma deblocking filter configured to filter an edge between adjacent blocks associated with the video data, where a block of the adjacent blocks corresponds to one of a prediction block and a transform block. The processing module is communicatively associated with the deblocking module and is operable to configure at least one filter coefficient corresponding to the chroma deblocking filter based on one or more filter coefficients corresponding to the luma deblocking filter. The processing module is further configured to cause the chroma deblocking filter to filter the edge between the adjacent blocks based on the configured at least one filter coefficient.

公开(公告)号：US20220394310A1

公开(公告)日：2022-12-08

申请号：US17888540

申请日：2022-08-16

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Mangesh Devidas Sadafale

IPC: H04N19/86 ,  H04N19/159 ,  H04N19/176 ,  H04N19/117 ,  H04N19/14 ,  H04N19/80

Abstract: Several methods and systems for reducing blocking artifacts are disclosed. In an embodiment, the method includes receiving a pair of adjacent blocks having an edge being positioned between the adjacent blocks. The pair of adjacent blocks is associated with one or more coding blocks. The one or more coding blocks comprise one or more coding information associated with the coding of the pair of adjacent blocks. The method also includes conducting a determination of whether the pair of adjacent blocks is coded in a skip-mode based on the one or more coding information. The edge is filtered based on the determination. Filtering the edge comprises disabling a de-blocking filtering of the edge based on a determination that the pair of adjacent blocks is coded in the skip-mode; and enabling the de-blocking filtering of the edge based on determination that the pair of adjacent blocks is not associated with the skip-mode.

公开(公告)号：US12003784B2

公开(公告)日：2024-06-04

申请号：US17074308

申请日：2020-10-19

Applicant: Texas Instruments Incorporated

Inventor： Mangesh Devidas Sadafale ,  Minhua Zhou

IPC: H04N19/86 ,  H04N19/117 ,  H04N19/157 ,  H04N19/176 ,  H04N19/436

CPC classification number: H04N19/86 ,  H04N19/117 ,  H04N19/157 ,  H04N19/176 ,  H04N19/436

Abstract: Deblocking filtering is provided in which an 8×8 filtering block covering eight sample vertical and horizontal boundary segments is divided into filtering sub-blocks that can be independently processed. To process the vertical boundary segment, the filtering block is divided into top and bottom 8×4 filtering sub-blocks, each covering a respective top and bottom half of the vertical boundary segment. To process the horizontal boundary segment, the filtering block is divided into left and right 4×8 filtering sub-blocks, each covering a respective left and right half of the horizontal boundary segment. The computation of the deviation d for a boundary segment in a filtering sub-block is performed using only samples from rows or columns in the filtering sub-block. Consequently, the filter on/off decisions and the weak/strong filtering decisions of the deblocking filtering are performed using samples contained within individual filtering blocks, thus allowing full parallel processing of the filtering blocks.

公开(公告)号：US11432017B2

公开(公告)日：2022-08-30

申请号：US16831084

申请日：2020-03-26

Applicant: Texas Instruments Incorporated

Inventor： Mangesh Devidas Sadafale

IPC: H04N19/00 ,  H04N19/86 ,  H04N19/159 ,  H04N19/176 ,  H04N19/117 ,  H04N19/14 ,  H04N19/80

Abstract: Several methods and systems for reducing blocking artifacts are disclosed. In an embodiment, the method includes receiving a pair of adjacent blocks having an edge being positioned between the adjacent blocks. The pair of adjacent blocks is associated with one or more coding blocks. The one or more coding blocks comprise one or more coding information associated with the coding of the pair of adjacent blocks. The method also includes conducting a determination of whether the pair of adjacent blocks is coded in a skip-mode based on the one or more coding information. The edge is filtered based on the determination. Filtering the edge comprises disabling a de-blocking filtering of the edge based on a determination that the pair of adjacent blocks is coded in the skip-mode; and enabling the de-blocking filtering of the edge based on determination that the pair of adjacent blocks is not associated with the skip-mode.

公开(公告)号：US09762930B2

公开(公告)日：2017-09-12

申请号：US14987570

申请日：2016-01-04

Applicant: Texas Instruments Incorporated

Inventor： Mangesh Devidas Sadafale ,  Minhua Zhou

IPC: H04N19/117 ,  H04N19/86 ,  H04N19/176 ,  H04N19/157 ,  H04N19/436

CPC classification number: H04N19/86 ,  H04N19/117 ,  H04N19/157 ,  H04N19/176 ,  H04N19/436

Abstract: Deblocking filtering is provided in which an 8×8 filtering block covering eight sample vertical and horizontal boundary segments is divided into filtering sub-blocks that can be independently processed. To process the vertical boundary segment, the filtering block is divided into top and bottom 8×4 filtering sub-blocks, each covering a respective top and bottom half of the vertical boundary segment. To process the horizontal boundary segment, the filtering block is divided into left and right 4×8 filtering sub-blocks, each covering a respective left and right half of the horizontal boundary segment. The computation of the deviation d for a boundary segment in a filtering sub-block is performed using only samples from rows or columns in the filtering sub-block. Consequently, the filter on/off decisions and the weak/strong filtering decisions of the deblocking filtering are performed using samples contained within individual filtering blocks, thus allowing full parallel processing of the filtering blocks.

公开(公告)号：US20250080776A1

公开(公告)日：2025-03-06

申请号：US18950554

申请日：2024-11-18

Applicant: Texas Instruments Incorporated

Inventor： Mangesh Devidas Sadafale

IPC: H04N19/86 ,  H04N19/117 ,  H04N19/134 ,  H04N19/176 ,  H04N19/186

Abstract: Several systems, methods and integrated circuits capable of reducing blocking artifacts in video data are disclosed. In an embodiment, a system for reducing blocking artifacts in video data includes a processing module and a deblocking module. The deblocking module comprises a luma deblocking filter and a chroma deblocking filter configured to filter an edge between adjacent blocks associated with the video data, where a block of the adjacent blocks corresponds to one of a prediction block and a transform block. The processing module is communicatively associated with the deblocking module and is operable to configure at least one filter coefficient corresponding to the chroma deblocking filter based on one or more filter coefficients corresponding to the luma deblocking filter. The processing module is further configured to cause the chroma deblocking filter to filter the edge between the adjacent blocks based on the configured at least one filter coefficient.

公开(公告)号：US20240314363A1

公开(公告)日：2024-09-19

申请号：US18676745

申请日：2024-05-29

Applicant: Texas Instruments Incorporated

Inventor： Mangesh Devidas Sadafale ,  Minhua Zhou

IPC: H04N19/86 ,  H04N19/117 ,  H04N19/157 ,  H04N19/176 ,  H04N19/436

CPC classification number: H04N19/86 ,  H04N19/117 ,  H04N19/157 ,  H04N19/176 ,  H04N19/436

Abstract: Deblocking filtering is provided in which an 8×8 filtering block covering eight sample vertical and horizontal boundary segments is divided into filtering sub-blocks that can be independently processed. To process the vertical boundary segment, the filtering block is divided into top and bottom 8×4 filtering sub-blocks, each covering a respective top and bottom half of the vertical boundary segment. To process the horizontal boundary segment, the filtering block is divided into left and right 4×8 filtering sub-blocks, each covering a respective left and right half of the horizontal boundary segment. The computation of the deviation d for a boundary segment in a filtering sub-block is performed using only samples from rows or columns in the filtering sub-block. Consequently, the filter on/off decisions and the weak/strong filtering decisions of the deblocking filtering are performed using samples contained within individual filtering blocks, thus allowing full parallel processing of the filtering blocks.

公开(公告)号：US20160119650A1

公开(公告)日：2016-04-28

申请号：US14987570

申请日：2016-01-04

Applicant: Texas Instruments Incorporated

Inventor： Mangesh Devidas Sadafale ,  Minhua Zhou

IPC: H04N19/86 ,  H04N19/436 ,  H04N19/176 ,  H04N19/117 ,  H04N19/157

CPC classification number: H04N19/86 ,  H04N19/117 ,  H04N19/157 ,  H04N19/176 ,  H04N19/436

Abstract: Deblocking filtering is provided in which an 8x8 filtering block covering eight sample vertical and horizontal boundary segments is divided into filtering sub-blocks that can be independently processed. To process the vertical boundary segment, the filtering block is divided into top and bottom 8x4 filtering sub-blocks, each covering a respective top and bottom half of the vertical boundary segment. To process the horizontal boundary segment, the filtering block is divided into left and right 4x8 filtering sub-blocks, each covering a respective left and right half of the horizontal boundary segment. The computation of the deviation d for a boundary segment in a filtering sub-block is performed using only samples from rows or columns in the filtering sub-block. Consequently, the filter on/off decisions and the weak/strong filtering decisions of the deblocking filtering are performed using samples contained within individual filtering blocks, thus allowing full parallel processing of the filtering blocks.

Abstract translation: 提供去块滤波，其中覆盖八个垂直和水平边界段的8×8滤波块被划分为可以独立处理的滤波子块。 为了处理垂直边界段，滤波块被分为顶部和底部8×4个滤波子块，每个子块覆盖垂直边界段的相应顶部和底部。 为了处理水平边界段，滤波块被划分为左和右4×8个滤波子块，每个子块覆盖水平边界段的相应左和右半部分。 滤波子块中的边界段的偏差d的计算仅使用过滤子块中的行或列的样本来进行。 因此，使用包含在各个滤波块内的采样来执行滤波器的开/关判定以及去块滤波的弱/强滤波决策，从而允许滤波块的完全并行处理。

公开(公告)号：US12058382B2

公开(公告)日：2024-08-06

申请号：US17888540

申请日：2022-08-16

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Mangesh Devidas Sadafale

IPC: H04N19/00 ,  H04N19/117 ,  H04N19/14 ,  H04N19/159 ,  H04N19/176 ,  H04N19/80 ,  H04N19/86

CPC classification number: H04N19/86 ,  H04N19/117 ,  H04N19/14 ,  H04N19/159 ,  H04N19/176 ,  H04N19/80

Abstract: Several methods and systems for reducing blocking artifacts are disclosed. In an embodiment, the method includes receiving a pair of adjacent blocks having an edge being positioned between the adjacent blocks. The pair of adjacent blocks is associated with one or more coding blocks. The one or more coding blocks comprise one or more coding information associated with the coding of the pair of adjacent blocks. The method also includes conducting a determination of whether the pair of adjacent blocks is coded in a skip-mode based on the one or more coding information. The edge is filtered based on the determination. Filtering the edge comprises disabling a de-blocking filtering of the edge based on a determination that the pair of adjacent blocks is coded in the skip-mode; and enabling the de-blocking filtering of the edge based on determination that the pair of adjacent blocks is not associated with the skip-mode.

公开(公告)号：US20230098413A1

公开(公告)日：2023-03-30

申请号：US18071863

申请日：2022-11-30

Applicant: Texas Instruments Incorporated

Inventor： Mangesh Devidas Sadafale

IPC: H04N19/86 ,  H04N19/176 ,  H04N19/134 ,  H04N19/117 ,  H04N19/186

Abstract: Several systems, methods and integrated circuits capable of reducing blocking artifacts in video data are disclosed. In an embodiment, a system for reducing blocking artifacts in video data includes a processing module and a deblocking module. The deblocking module comprises a luma deblocking filter and a chroma deblocking filter configured to filter an edge between adjacent blocks associated with the video data, where a block of the adjacent blocks corresponds to one of a prediction block and a transform block. The processing module is communicatively associated with the deblocking module and is operable to configure at least one filter coefficient corresponding to the chroma deblocking filter based on one or more filter coefficients corresponding to the luma deblocking filter. The processing module is further configured to cause the chroma deblocking filter to filter the edge between the adjacent blocks based on the configured at least one filter coefficient.