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公开(公告)号:US08824540B2
公开(公告)日:2014-09-02
申请号:US13591666
申请日:2012-08-22
IPC分类号: H03H7/30
CPC分类号: H04L25/03057
摘要: Equalization techniques are provided for high-speed data communications and, more specifically, DFE (decision feedback equalizer) circuits and methods are provided which implement a high-order continuous time filter in a DFE feedback path to emulate structured elements of a channel response.
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12.
公开(公告)号:US20090252215A1
公开(公告)日:2009-10-08
申请号:US12061268
申请日:2008-04-02
IPC分类号: H04L27/01
CPC分类号: H04L25/03019 , H04L25/03031
摘要: A decision feedback equalizer (DFE) and method including a branch coupled to an input and including a sample-and-hold element configured to receive and sample a received input signal from the input and a current-integrating summer. The current-integrating summer is coupled to an output of the sample-and-hold element. The summer is configured to receive and sum currents representing at least one previous decision and an input sample. The at least one previous decision and the input sample are integrated onto a node, wherein the input sample is held constant during an integration period, thereby mitigating the effects of input transitions on an output of the summer.
摘要翻译: 一种判决反馈均衡器(DFE)和方法,包括耦合到输入端并包括采样保持元件的分支,所述采样保持元件被配置为从所述输入端接收和采样所接收的输入信号以及电流积分夏令。 电流积分加法器与采样保持元件的输出耦合。 夏天被配置为接收并且表示至少一个先前决定和输入样本的和电流。 至少一个先前的决定和输入样本被集成到节点上,其中输入样本在积分期间保持不变,从而减轻输入转换对夏季输出的影响。
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