公开(公告)号：US20130024852A1

公开(公告)日：2013-01-24

申请号：US13541001

申请日：2012-07-03

申请人： Ilya Firman ,  Jasper S. Lin ,  Mark D. Womack ,  Yu-Kuan Lin ,  Sheng-chi Hsieh ,  Juliana Tsang

发明人： Ilya Firman ,  Jasper S. Lin ,  Mark D. Womack ,  Yu-Kuan Lin ,  Sheng-chi Hsieh ,  Juliana Tsang

IPC分类号： G06F9/445

CPC分类号： G06Q30/0621 ,  G06F8/60 ,  G06F8/71 ,  G06Q20/123 ,  G06Q30/0603 ,  H04L67/34

摘要： In one aspect, this application describes a method for determining a version of a software application targeted for a computing device. The method includes receiving, at an application marketplace system and from a user associated with a computing device that operates remotely from the application marketplace system, a request that corresponds to a software application distributed by the application marketplace system, the software application having multiple versions on the application marketplace system. The method also includes determining one or more device attributes that are associated with the computing device, and identifying a particular version of the software application, from among the multiple versions on the application marketplace system, that is targeted for the computing device based on the device attributes. The method also includes providing, for display to the user and in response to the request, information related to the particular version of the software application.

公开(公告)号：US20100315862A1

公开(公告)日：2010-12-16

申请号：US12727985

申请日：2010-03-19

申请人： Huai-Ying Huang ,  Yu-Kuan Lin ,  Sheng Chiang Hung ,  Feng-Ming Chang ,  Jui-Lin Chen ,  Ping-Wei Wang

发明人： Huai-Ying Huang ,  Yu-Kuan Lin ,  Sheng Chiang Hung ,  Feng-Ming Chang ,  Jui-Lin Chen ,  Ping-Wei Wang

IPC分类号： G11C11/00

CPC分类号： G11C11/412 ,  G11C11/419

摘要： SRAM cells and SRAM cell arrays are described. In one embodiment, an SRAM cell includes a first inverter and a second inverter cross-coupled with the first inverter to form a first data storage node and a complimentary second data storage node for latching a value. The SRAM cell further includes a first pass-gate transistor and a switch transistor. A first source/drain of the first pass-gate transistor is coupled to the first data storage node, and a second source/drain of the first pass-gate transistor is coupled to a first bit line. The first source/drain of the switch transistor is coupled to the gate of the first pass-gate transistor.

摘要翻译： 描述SRAM单元和SRAM单元阵列。 在一个实施例中，SRAM单元包括与第一反相器交叉耦合的第一反相器和第二反相器，以形成第一数据存储节点和用于锁存值的互补的第二数据存储节点。 SRAM单元还包括第一栅极晶体管和开关晶体管。 第一栅极晶体管的第一源极/漏极耦合到第一数据存储节点，并且第一栅极晶体管的第二源极/漏极耦合到第一位线。 开关晶体管的第一源极/漏极耦合到第一通过栅极晶体管的栅极。

公开(公告)号：US07773407B2

公开(公告)日：2010-08-10

申请号：US12147400

申请日：2008-06-26

申请人： Huai-Ying Huang ,  Yu-Kuan Lin ,  Sheng Chiang Hung ,  Ping-Wei Wang

发明人： Huai-Ying Huang ,  Yu-Kuan Lin ,  Sheng Chiang Hung ,  Ping-Wei Wang

IPC分类号： G11C7/00

CPC分类号： G11C8/16 ,  G11C11/412

摘要： This invention discloses a static random access memory (SRAM) cell comprising a pair of cross-coupled inverters connected between a positive supply voltage (Vcc) and a first node, a first NMOS transistor with a gate and drain connected to the first node and a source connected to a ground, and a second NMOS transistor with a drain and source connected to the first node and the ground, respectively, and a gate connected to a control-line.

摘要翻译： 本发明公开了一种静态随机存取存储器（SRAM）单元，其包括连接在正电源电压（Vcc）和第一节点之间的一对交叉耦合的反相器，具有与第一节点连接的栅极和漏极的第一NMOS晶体管和 源极连接到地，以及第二NMOS晶体管，其漏极和源极分别连接到第一节点和地，以及栅极连接到控制线。

公开(公告)号：US20090323401A1

公开(公告)日：2009-12-31

申请号：US12147400

申请日：2008-06-26

申请人： Huai-Ying Huang ,  Yu-Kuan Lin ,  Sheng Chiang Hung ,  Ping-Wei Wang

发明人： Huai-Ying Huang ,  Yu-Kuan Lin ,  Sheng Chiang Hung ,  Ping-Wei Wang

IPC分类号： G11C11/00

CPC分类号： G11C8/16 ,  G11C11/412

摘要： This invention discloses a static random access memory (SRAM) cell comprising a pair of cross-coupled inverters connected between a positive supply voltage (Vcc) and a first node, a first NMOS transistor with a gate and drain connected to the first node and a source connected to a ground, and a second NMOS transistor with a drain and source connected to the first node and the ground, respectively, and a gate connected to a control-line.

摘要翻译： 本发明公开了一种静态随机存取存储器（SRAM）单元，其包括连接在正电源电压（Vcc）和第一节点之间的一对交叉耦合的反相器，具有与第一节点连接的栅极和漏极的第一NMOS晶体管和 源极连接到地，以及第二NMOS晶体管，其漏极和源极分别连接到第一节点和地，以及栅极连接到控制线。