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公开(公告)号:US20100045325A1
公开(公告)日:2010-02-25
申请号:US12196531
申请日:2008-08-22
申请人: Yih-Yuh Doong , Tseng Chin Lo , Chien-Chang Lee , Chih-Chieh Shao
发明人: Yih-Yuh Doong , Tseng Chin Lo , Chien-Chang Lee , Chih-Chieh Shao
CPC分类号: H01L22/34 , H01L2924/0002 , H01L2924/00
摘要: An integrated circuit structure includes a semiconductor wafer; integrated circuit devices in the semiconductor wafer; and a plurality of test pads on a top surface of the semiconductor wafer and connected to the integrated circuit devices. Test pads are grouped in pairs, with the test pads in a same pair are interconnected.
摘要翻译: 集成电路结构包括半导体晶片; 半导体晶片中的集成电路器件; 以及在半导体晶片的顶表面上并连接到集成电路器件的多个测试焊盘。 测试垫成对分组,同一对中的测试垫互连。