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公开(公告)号：US10817025B2
公开(公告)日：2020-10-27
申请号：US16475380
申请日：2019-03-06
Abstract: A narrow-bezel display module includes a display panel, a drive chip, and a flexible printed circuit board. The display panel includes a glass substrate and a TFT substrate. The glass substrate includes a bottom border. The drive chip is attached on the bottom border of the glass substrate. The drive chip includes an output end and an input end arranged opposite to each other and two side surfaces. The input end is connected to a first metal layer of the TFT substrate. The output end is connected to a second metal layer of the TFT substrate. The flexible printed circuit board includes conductive leads and a first connection portion and a second connection portion extended from one side of the conductive leads. The first connection portion and the second connection portion are connected to the input end from the two side surfaces respectively.
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公开(公告)号：US20200321475A1
公开(公告)日：2020-10-08
申请号：US16308814
申请日：2018-09-22
Inventor： Xin Zhang , Juncheng Xiao , Haifeng Chen , Haijun Tian , Yanqing Guan , Chao Tian
IPC: H01L29/786 , H01L27/12 , H01L21/265 , H01L29/66
Abstract: A manufacturing method for LTPS TFT substrate is disclosed. Through performing two etchings on the gate metal layer, ion heavy doping and ion light doping of the polysilicon active layer are performed in a self-aligned manner such that the LDD structure of the polysilicon active layer is symmetrically distributed on two sides of the gate electrode, which is beneficial to improve device characteristics, is more stable and reliable than the conventional technology, and can reduce the number of process masks, save mask cost, operation cost, material cost and the time cost. The thinning process of the gate insulation layer can reduce the thickness of the gate insulation layer corresponding to the heavily doped region of the polysilicon active layer, so that the ion implantation efficiency can be effectively improved.
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Patent Agency Ranking
公开(公告)号：US10714044B1
公开(公告)日：2020-07-14
申请号：US16349625
申请日：2018-10-10
Inventor： Xin Zhang , Juncheng Xiao , Yanqing Guan , Chao Tian
IPC: G09G3/36
Abstract: A gate driver of array (GOA) circuit and a display device are disclosed. An n-th sub-circuit in the GOA circuit includes a control module, an output module, a pull-up supplement module, and a leakage switch. The pull-up supplement module includes a supplement switch and an auxiliary switch. The supplement switch is coupled to the auxiliary switch, the control module, and the output module. The auxiliary switch is coupled to the supplement switch, the control module, and the output module. The leakage switch is coupled to the control module, the output module, the supplement switch, and the auxiliary switch.
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公开(公告)号：US10685593B2
公开(公告)日：2020-06-16
申请号：US16342209
申请日：2018-09-11
Inventor： Xin Zhang , Juncheng Xiao , Yanqing Guan , Chao Tian
IPC: G09G3/20
Abstract: A pixel driving circuit is provided. The pixel driving circuit comprises a reset module, a compensation module and light emitting module, wherein the reset module is configured to transmit a data signal to the compensation module to reset the compensation module under controlling of a first driving signal, the compensation module is configured to write the data signal to compensate a threshold voltage under controlling of a second driving signal, and the light emitting module is configured to emit light under controlling of a third driving signal.
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公开(公告)号：US11187742B2
公开(公告)日：2021-11-30
申请号：US16484117
申请日：2019-04-26
Inventor： Xin Zhang , Jingfeng Xue , Siwen Miao
IPC: G01R31/28 , H01L23/498 , H01L27/12
Abstract: The present disclosure provides a display panel and a method for testing for occurrence of a crack in the display panel. The display panel includes a panel body, a ground line, a first ground connecting portion, a first testing portion, a second ground connecting portion, a second testing portion, a first switch and a second switch, the ground line surrounds the display region, the first ground connecting portion and the first testing portion are parallel connected to one end of the ground line, the second ground connecting portion and the second testing portion are parallel to another end of the ground line, the first switch is electrically connected between the first ground connecting portion and one end of the ground line, the second switch is electrically connected between the second ground connecting portion and another end of the ground line.
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公开(公告)号：US11127363B2
公开(公告)日：2021-09-21
申请号：US16302678
申请日：2018-08-16
Inventor： Xin Zhang , Juncheng Xiao , Chao Tian , Yanqing Guan
IPC: G09G3/36
Abstract: A gate driver on array (GOA) circuit, a liquid crystal panel comprising the GOA circuit, and a display device including the liquid crystal panel are provided. The GOA circuit comprises a forward and backward scanning control module configured to control the GOA circuit to perform forward scan or backward scan according to a forward scanning signal or a backward scanning signal respectively, a first voltage stabilizing module configured to maintain a voltage level of a first node, and a second voltage stabilizing module electrically connecting to the forward and backward scanning control module, and configured to maintain a voltage level of an output signal of the forward and backward scanning control module.
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公开(公告)号：US09628050B2
公开(公告)日：2017-04-18
申请号：US14783100
申请日：2015-08-10
Inventor： Mang Zhao , Yong Tian , Gui Chen , Caiqin Chen , Xin Zhang
CPC classification number: H03K3/012 , G09G3/3677 , G09G2300/0408 , G09G2300/0814 , G09G2310/0202 , G09G2310/0289
Abstract: A scan driving circuit configured for driving cascaded scan lines is provided, which includes an input control module, a latch module, a driving-signal generation module, an output control module, a constant high voltage source and a constant low voltage source. The scan driving circuit of the present invention drives the input control module through cascade signals of a preceding stage and cascade signals of a succeeding stage, so as to reduce interference and the driving power consumption of the scan driving circuit.
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