METHOD OF OPERATING NONVOLATILE MEMORY DEVICE, METHOD OF OPERATING CONTROLLER, AND METHOD OF OPERATING MEMORY SYSTEM INCLUDING THE SAME
    11.
    发明申请
    METHOD OF OPERATING NONVOLATILE MEMORY DEVICE, METHOD OF OPERATING CONTROLLER, AND METHOD OF OPERATING MEMORY SYSTEM INCLUDING THE SAME 审中-公开
    操作非易失性存储器件的方法,操作控制器的方法和操作包括其的存储器系统的方法

    公开(公告)号:US20110219288A1

    公开(公告)日:2011-09-08

    申请号:US13040807

    申请日:2011-03-04

    IPC分类号: H03M13/09 G06F11/10

    CPC分类号: G06F11/10 H03M13/09

    摘要: An method of operating a memory system including a nonvolatile memory device and a controller. The method includes receiving a source word, converting the received source word to a codeword, and programming the converted codeword in the nonvolatile memory device. A length of the converted codeword can be greater than a length of the received source word, and a difference between the numbers of first and second digital bits of the converted codeword can be less than a reference value.

    摘要翻译: 一种操作包括非易失性存储器件和控制器的存储器系统的方法。 该方法包括接收源字,将接收到的源字转换为码字,以及对非易失性存储器件中的经转换的码字进行编程。 经转换的码字的长度可以大于所接收的源字的长度,并且转换的码字的第一和第二数字位的数目之间的差可以小于参考值。

    NONVOLATILE MEMORY DEVICE USING INTERLEAVING TECHNOLOGY AND PROGRAMMMING METHOD THEREOF
    12.
    发明申请
    NONVOLATILE MEMORY DEVICE USING INTERLEAVING TECHNOLOGY AND PROGRAMMMING METHOD THEREOF 有权
    使用交互技术的非易失性存储器件及其编程方法

    公开(公告)号:US20110216590A1

    公开(公告)日:2011-09-08

    申请号:US13040626

    申请日:2011-03-04

    IPC分类号: G11C16/10

    CPC分类号: G11C16/10

    摘要: A nonvolatile memory device using interleaving technology is provided. The nonvolatile memory device includes a first controller configured to allocate one of 2N threshold voltage states to N-bit data where N is 2 or a natural number greater than 2, a second controller configured to set a difference between adjacent threshold voltage states among the 2N threshold voltage states so that the difference increases as a threshold voltage increases, and a programming unit configured to form a threshold voltage distribution state corresponding to the allocated threshold voltage state and to program the N-bit data to a multi-level cell. The second controller controls the difference between the adjacent threshold voltage states to equalize the number of read errors for all intersections among the 2N threshold voltage states at the end of life.

    摘要翻译: 提供了一种使用交错技术的非易失性存储器件。 非易失性存储器件包括:第一控制器,被配置为将2N个阈值电压状态中的一个分配给N为2或大于2的自然数的N位数据;第二控制器,被配置为将2N的阈值电压状态之间的差设定为2N 阈值电压状态使得差异随阈值电压增加而增加,并且编程单元被配置为形成与所分配的阈值电压状态相对应的阈值电压分布状态,并将N位数据编程到多电平单元。 第二控制器控制相邻阈值电压状态之间的差异,以平衡在寿命结束时的2N个阈值电压状态之间的所有交点的读取误差的数量。