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公开(公告)号:US20220181426A1
公开(公告)日:2022-06-09
申请号:US17437033
申请日:2021-01-20
Inventor: Gong CHEN , Yuqing YANG , Yiyang ZHANG , Zheng BAO , Zhiyong YANG , Yang ZHOU , Huijun LI , Tingliang LIU , Huijuan YANG , Xin ZHANG , Meng ZHANG , Xiaofeng JIANG , Hao ZHANG , Yu WANG
IPC: H01L27/32
Abstract: The present disclosure provides an array substrate, a method for manufacturing an array substrate and a display panel. The array substrate includes: a base having a display area, a peripheral area surrounding the display area, and a visible area located between the display area and the peripheral area; a plurality of voltage signal lines disposed on the base; a metal strip disposed on the base, the voltage signal lines are coupled to the metal strip, at least a portion of the metal strip is located in the visible area, and the portion of the metal strip located in the visible area is provided with an opening.
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公开(公告)号:US20220114930A1
公开(公告)日:2022-04-14
申请号:US17262826
申请日:2020-04-15
Inventor: Xiaofeng JIANG , Linhong HAN , Huijun LI , Huijuan YANG , Yu WANG , Lu BAI , Jie DAI , Lulu YANG , Yi QU , Siyu WANG , Hao ZHANG , Xin ZHANG
Abstract: The present disclosure relates to a display substrate, a display panel and a display device. The display substrate includes: a base substrate including a display area and a peripheral area surrounding the display area; a common electrode located in the peripheral area and surrounding the display area; a panel crack detection line located in the peripheral area and surrounding the display area, wherein the panel crack detection line is located on one side of the common electrode away from the display area; and at least one electrostatic discharge circuit located in the peripheral area, wherein the at least one electrostatic discharge circuit includes at least one first thin film transistor including an active layer, a gate, a source and a drain, the source and the drain are electrically connected to the panel crack detection line, and the gate is electrically connected to the common electrode.
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公开(公告)号:US20250031541A1
公开(公告)日:2025-01-23
申请号:US18903004
申请日:2024-10-01
Inventor: Bo ZHANG , Xiaoqing SHU , Zhenhua ZHANG , Rong WANG , Zhenggang WU , Xin ZHANG , Yang ZHOU , Junxiu DAI , Maoying LIAO , Yi ZHANG
IPC: H10K59/131 , G09G3/20 , G09G3/3233 , H10K59/121 , H10K59/65
Abstract: A display substrate and a display device. In the display substrate, at least one of the inter-opening region, the first opening peripheral region and the second opening peripheral region includes a first virtual sub-pixel; the first signal line extends along a first direction and includes a first portion passing through the first opening peripheral region, the inter-opening region and the second opening peripheral region; the first portion passes through the first virtual sub-pixel, and the first virtual sub-pixel includes a first compensation capacitor, a first plate of the first compensation capacitor is in a same layer as the first portion of the first signal line and electrically connected with the first portion of the first signal line, and in a same layer as the second plate of the storage capacitor; the second plate is in a different layer from, insulated from, and overlaps with the first plate.
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公开(公告)号:US20240244929A1
公开(公告)日:2024-07-18
申请号:US18577055
申请日:2021-07-23
Inventor: Junxiu DAI , Tingliang LIU , Yang ZHOU , Xin ZHANG , Yi QU
IPC: H10K59/80 , G06F3/041 , G09G3/00 , H10K59/131 , H10K59/40
CPC classification number: H10K59/873 , G06F3/0412 , H10K59/131 , H10K59/40 , G09G3/006
Abstract: A display panel includes a display area surrounding a through hole and an isolation area between the through hole and the display area. The isolation area includes at least two annular blocking dams surrounding the through hole. A first metal layer, an insulating layer and a second metal layer are arranged in a gap between the adjacent annular blocking dams. The isolation area further includes a through hole crack detection line wound around the edge of the through hole. The through hole crack detection line includes a first detection line and a second detection line. The first detection line on the same layer as the first metal layer and the second detection line on the same layer as the second metal layer are electrically connected through a via hole of the insulating layer.
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公开(公告)号:US20240194123A1
公开(公告)日:2024-06-13
申请号:US17907936
申请日:2021-09-29
IPC: G09G3/32 , H01L25/075 , H01L25/16 , H01L27/12 , H01L33/62
CPC classification number: G09G3/32 , H01L25/0753 , H01L25/167 , H01L27/124 , H01L33/62 , G09G2310/0267 , G09G2320/0233
Abstract: A display substrate includes a first voltage line, an alternating current signal line and a second voltage line arranged on a substrate, the substrate includes a display region and a non-display region; the display substrate further includes a first conductive layer, a first insulation layer and a second conductive layer laminated one on another on the substrate, the first voltage line and the alternating current signal line are arranged on the first conductive layer, and the second voltage line is arranged on the second conductive layer; the first voltage line is lapped onto the second voltage line through a first groove penetrating through the first insulation layer; and an orthogonal projection of the second voltage line onto the substrate overlaps an orthogonal projection of the alternating current signal line onto the substrate at an overlapping region.
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公开(公告)号:US20240130189A1
公开(公告)日:2024-04-18
申请号:US18275931
申请日:2021-10-22
Inventor: Yi QU , Maoying LIAO , Junxiu DAI , Lu BAI , Yang ZHOU , Xin ZHANG
IPC: H10K59/131
CPC classification number: H10K59/1315
Abstract: Provided is a display substrate. The display substrate includes: a display region and a bonding region on a side of the display region, wherein the display region includes a plurality of pixel columns; and a wiring structure, disposed between the display region and the bonding region and including a plurality of traces, wherein one of the plurality of traces corresponds to one of the plurality of pixel columns, the plurality of traces are electrically connected to the plurality of pixel columns to supply an electric signal to pixels, and each of the plurality of traces includes a plurality of sub-traces, wherein at least one of line lengths and line widths of sub-traces corresponding to at least a part of the plurality of traces are different, such that total resistances of the at least the part of the plurality of traces are basically equal.
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公开(公告)号:US20230027375A1
公开(公告)日:2023-01-26
申请号:US17764991
申请日:2021-05-27
Inventor: Hao ZHANG , Tingliang LIU , Huijuan YANG , Yang ZHOU , Yu WANG , Xin ZHANG , Xiaofeng JIANG , Yupeng HE
Abstract: A display panel, crack detection method therefor, and display device. The display panel comprises a display area (100) provided with at least one first data line (101) and at least one second data line (102), and peripheral area (200) surrounding the display area and provided with a first crack detection line, second crack detection line, first detection switch circuit (51), and second detection switch circuit (52); the first crack detection line and second crack detection line are in different functional layers; the first crack detection line has a first end (A) electrically connected to a first test end and a second end (C) electrically connected to first detection switch circuit; the second crack detection line has a first end (B1) electrically connected to a third node (B) that is different from the first end (A) and second end (C), and a second end (A1 electrically connected to second detection switch circuit.
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公开(公告)号:US20220367602A1
公开(公告)日:2022-11-17
申请号:US17755304
申请日:2020-03-25
Inventor: Huijun LI , Tingliang LIU , Tinghua SHANG , Huijuan YANG , Lulu YANG , Xiaofeng JIANG , Yi QU , Xin ZHANG , Meng ZHANG , Junxi WANG , Siyu WANG , Lu BAI , Jie DAI , Hao ZHANG , Yu WANG , Mengqi WANG
IPC: H01L27/32
Abstract: Disclosed are a display panel and a display device. The display panel comprises: a base substrate, a plurality of scanning lines, a first insulating layer, a plurality of data lines, an interlayer insulating layer, and an auxiliary power line. The auxiliary power line comprises: a plurality of sub-auxiliary power lines and a plurality of auxiliary conduction lines; the plurality of sub-auxiliary power lines are arranged in a first direction and extend in a second direction, and two sub-auxiliary power lines that are at least partially adjacent are electrically connected by means of at least one auxiliary conduction line; the orthographic projection of at least one of the plurality of auxiliary conduction lines on the base substrate does not overlap the orthographic projections of the scanning lines on the base substrate.
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公开(公告)号:US20220344449A1
公开(公告)日:2022-10-27
申请号:US17432202
申请日:2020-03-13
Inventor: Xiaofeng JIANG , Linhong HAN , Huijuan YANG , Huijun LI , Xin ZHANG , Meng ZHANG , Lulu YANG , Jie DAI , Lu BAI , Siyu WANG , Yu WANG , Yupeng HE , Yi QU
IPC: H01L27/32
Abstract: A display panel and a display device are provided. The display panel includes: a display part including a plurality of data lines; a fan-out part including a plurality of fan-out lines; and a lead wire part including a plurality of first lead wires which are respectively connected with the plurality of data lines through the plurality of fan-out lines, and the plurality of fan-out lines are fanned out between the lead wire part and the display part. The plurality of first lead wires each include a first lead wire subpart and a compensation part to form a plurality of first lead wire subparts and a plurality of compensation parts, the plurality of first lead wire subparts are respectively connected with the plurality of compensation parts; the first lead subparts (WS1) have a width different from that of the compensation parts.
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公开(公告)号:US20220320236A1
公开(公告)日:2022-10-06
申请号:US17425007
申请日:2021-03-12
Inventor: Jie DAI , Pengfei YU , Lu BAI , Xiaofeng JIANG , Hao ZHANG , Siyu WANG , Huijuan YANG , Xin ZHANG
Abstract: A display substrate and a manufacture method thereof, and a display device are provided. The display substrate includes a display region and a peripheral region, the peripheral region includes a first scan driving circuit and a second scan driving circuit on a first side of the display region, the peripheral region further includes a binding region on a second side of the display region, the peripheral region includes an organic insulation layer, the organic insulation layer at least partially covers the first scan driving circuit and the second scan driving circuit, and includes a first groove that is in a strip shape and extends substantially along a first direction to expose a portion between the first scan driving circuit and the second scan driving circuit, and the first groove also extends from the first side to the second side and extends substantially along a second direction on the second side.
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