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公开(公告)号:US09742673B2
公开(公告)日:2017-08-22
申请号:US14477244
申请日:2014-09-04
Applicant: Cisco Technology, Inc.
Inventor: Ayan Banerjee , Srinivasan Ramabadran , Mehak Mahajan , Raghava Sivaramu , Nataraj Bacthu , Raja Rao Tadimeti , Madhava Rao Cheethirala , Ramana Mellacheruvu
IPC: H04H20/71 , H04L12/741 , H04L12/58 , H04W28/12 , H04W72/00 , H04L12/721 , H04L12/801 , H04L12/761 , H04L12/745
CPC classification number: H04L45/745 , H04L45/16 , H04L45/72 , H04L45/748 , H04L47/33 , H04L51/10 , H04W28/12 , H04W72/005
Abstract: A plurality of line cards with each line card having a respective network forwarding engine and a respective outgoing interface (OIF) list and at least one fabric module communicatively coupled with each line card with each fabric module can have a respective network forwarding engine. The local OIF list can be asymmetrically programmed. The network forwarding engine of a line card can be configured to receive a multicast packet, compare a multicast address associate with the received multicast packet with entries in the local OIF list of the line card and forward the received multicast packet to at least one interface associated with the multicast address in response to the comparison resulting in a match.
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公开(公告)号:US20170214618A1
公开(公告)日:2017-07-27
申请号:US15003217
申请日:2016-01-21
Applicant: Cisco Technology, Inc.
Inventor: Ayan Banerjee , Raghava Sivaramu , Ambrish Mehta , Swaminathan Narayanan , Shiv Saini , Mehak Mahajan
IPC: H04L12/64 , H04L12/931 , H04L12/933 , H04L12/745
CPC classification number: H04L45/741 , H04L45/74 , H04L45/748 , H04L49/10 , H04L49/25 , H04L49/352 , H04L61/6068
Abstract: In one embodiment an approach is provided to efficiently program routes on line cards and fabric modules in a modular router to avoid hot spots and thus avoid undesirable packet loss. Each fabric module includes two separate processors or application specific integrated circuits (ASICs). In another embodiment, each fabric module processor is replaced by a pair of fabric module processors arranged in series with each other, and each processor is responsible for routing only, e.g., IPv4 or IPv6 traffic. The pair of fabric module processors communicates with one another via a trunk line and any packet received at either one of the pair is passed to the other of the pair before being passed back to a line card.
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