公开(公告)号：US20060239083A1

公开(公告)日：2006-10-26

申请号：US11379752

申请日：2006-04-21

Applicant: Chang-Hyun LEE

Inventor： Chang-Hyun LEE

IPC: G11C16/04

CPC classification number: G11C16/0483 ,  H01L27/115 ,  H01L27/11521 ,  H01L27/11524

Abstract: A NAND flash memory device, and methods of forming and operating the same are provided. The NAND flash memory device includes first and second selection gate lines sequentially disposed at one side of a plurality of cell gate lines. A first selection transistor including the first selection gate line serves as a buffer for decreasing a highly boosted channel voltage of a non-selected cell to minimize the leakage current of the NAND flash memory device.

Abstract translation: 提供了一种NAND闪速存储器件及其形成和操作方法。 NAND闪存器件包括顺序地设置在多个单元栅极线的一侧的第一和第二选择栅极线。 包括第一选择栅极线的第一选择晶体管用作用于降低非选择单元的高度提升的沟道电压的缓冲器，以使NAND闪速存储器件的漏电流最小化。

公开(公告)号：US20060216891A1

公开(公告)日：2006-09-28

申请号：US11422592

申请日：2006-06-06

Applicant: Jung-Dal CHOI ,  Jong-Woo PARK ,  Seong-Soon CHO ,  Chang-Hyun LEE

Inventor： Jung-Dal CHOI ,  Jong-Woo PARK ,  Seong-Soon CHO ,  Chang-Hyun LEE

IPC: H01L21/336

CPC classification number: H01L27/11568 ,  H01L27/105 ,  H01L27/11573

Abstract: A non-volatile memory device includes a tunnel oxide layer, a charge storage layer, a blocking insulating layer, and a gate electrode that are sequentially stacked, as well as an impurity diffusion layer in an active region at both sides of the gate electrode. The gate electrode crosses active regions between device isolation layers formed in a predetermined area of a semiconductor substrate, and an edge of the charge storage layer is extended to have a protruding part that protrudes from the gate electrode. In order to form a charge storage layer having a protruding part, a stack insulating layer including first to third insulating layers is formed in an active region between the device isolation layers formed in the substrate. A plurality of gate electrodes crossing the active region are formed on the stack insulating layer, and a sidewall spacer is formed on both sidewalls of the gate electrode. Using the sidewall spacer and the gate electrode, the stack insulating layer is etched to form a charge storage layer that protrudes from the sidewall of the gate electrode.

Abstract translation: 非易失性存储器件包括依次层叠的隧道氧化物层，电荷存储层，阻挡绝缘层和栅电极，以及栅电极两侧的有源区中的杂质扩散层。 栅电极跨越形成在半导体衬底的预定区域中的器件隔离层之间的有源区，并且电荷存储层的边缘延伸成具有从栅电极突出的突出部分。 为了形成具有突出部分的电荷存储层，在形成在衬底中的器件隔离层之间的有源区域中形成包括第一至第三绝缘层的叠层绝缘层。 在堆叠绝缘层上形成与激活区交叉的多个栅电极，并且在栅电极的两个侧壁上形成侧墙。 使用侧壁间隔物和栅电极，对叠层绝缘层进行蚀刻以形成从栅电极的侧壁突出的电荷存储层。