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公开(公告)号：US20120178239A1
公开(公告)日：2012-07-12
申请号：US13427162
申请日：2012-03-22
IPC分类号： H01L21/768
CPC分类号： G11C17/16 , H01L23/5256 , H01L2924/0002 , H01L2924/00
摘要： A programmable device includes a substrate (10); an insulator (13) on the substrate; an elongated semiconductor material (12) on the insulator, the elongated semiconductor material having first and second ends, and an upper surface S; the first end (12a) is substantially wider than the second end (12b), and a metallic material is disposed on the upper surface; the metallic material being physically migratable along the upper surface responsive to an electrical current I flowable through the semiconductor material and the metallic material.
摘要翻译： 可编程器件包括衬底（10）; 绝缘体（13）; 绝缘体上的细长半导体材料（12），具有第一和第二端的细长半导体材料和上表面S; 第一端部（12a）比第二端部（12b）大得多，金属材料设置在上表面上; 所述金属材料可响应于流过半导体材料和金属材料的电流I而沿着上表面物理迁移。
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公开(公告)号：US20110032025A1
公开(公告)日：2011-02-10
申请号：US12911379
申请日：2010-10-25
IPC分类号： H01H37/76 , H01L21/768
CPC分类号： G11C17/16 , H01L23/5256 , H01L2924/0002 , H01L2924/00
摘要： A programmable device includes a substrate (10); an insulator (13) on the substrate; an elongated semiconductor material (12) on the insulator, the elongated semiconductor material having first and second ends, and an upper surface S; the first end (12a) is substantially wider than the second end (12b), and a metallic material is disposed on the upper surface; the metallic material being physically migratable along the upper surface responsive to an electrical current I flowable through the semiconductor material and the metallic material.
摘要翻译： 可编程器件包括衬底（10）; 绝缘体（13）; 绝缘体上的细长半导体材料（12），具有第一和第二端的细长半导体材料和上表面S; 第一端部（12a）比第二端部（12b）大得多，金属材料设置在上表面上; 所述金属材料可响应于流过半导体材料和金属材料的电流I而沿着上表面物理迁移。
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23.发明授权Using electrically programmable fuses to hide architecture, prevent reverse engineering, and make a device inoperable 失效使用电可编程保险丝隐藏架构，防止逆向工程，并使设备无法工作公开(公告)号：US07550789B2
公开(公告)日：2009-06-23
申请号：US12039829
申请日：2008-02-29
申请人： Anthony R. Bonaccio , Karl R. Erickson , John A. Fifield , Chandrasekharan Kothandaraman , Phil C. Paone , William R. Tonti
发明人： Anthony R. Bonaccio , Karl R. Erickson , John A. Fifield , Chandrasekharan Kothandaraman , Phil C. Paone , William R. Tonti
IPC分类号： H01L29/80
CPC分类号： G06F12/1433 , G06F21/6245
摘要： Techniques and systems whereby operation of and/or access to particular features of an electronic device may be controlled after the device has left the control of the manufacturer are provided. The operation and/or access may be provided based on values stored in non-volatile storage elements, such as electrically programmable fused (eFUSES).
摘要翻译： 提供了在设备已经离开制造商的控制之后可以控制电子设备的特定特征的操作和/或访问的技术和系统。 可以基于存储在诸如电可编程融合（eFUSES）的非易失性存储元件中的值来提供操作和/或访问。
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公开(公告)号：US07061308B2
公开(公告)日：2006-06-13
申请号：US10605466
申请日：2003-10-01
IPC分类号： G05F3/02
CPC分类号： G11C5/147 , H01L27/0802 , H01L27/088 , H02M3/00
摘要： A voltage divider for integrated circuits that does not include the use of resistors. In one embodiment, voltage node VDD is connected with two n-type transistors, NFET1 and NFET2, which are connected in series. NFET 1 includes a source (12), a drain (14), a gate electrode (16) having a gate area A1 (not shown), and a p-substrate (18). NFET2 includes a source (20), a drain (22), a gate electrode (24) having a gate area A2 (not shown), and a p-substrate (26). Source (12) and drain (14) of NFET1 are coupled with gate electrode (24) of NFET2. The voltage difference between NFET1 and NFET2 has a linear function with VDD. As a result, voltage VDD may be divided between NFET1 and NFET2 by properly choosing the ratio between each of the respective transistor gate electrode areas, (A1) and (A2).
摘要翻译： 用于集成电路的分压器，不包括使用电阻器。 在一个实施例中，电压节点VDD与串联连接的两个n型晶体管NFET 1和NFET 2连接。 NFET 1包括源极（12），漏极（14），具有栅极区域A 1（未示出）的栅电极（16）和p-衬底（18）。 NFET2包括源极（20），漏极（22），具有栅极区域A 2（未示出）的栅电极（24）和p基板（26）。 NFET 1的源极（12）和漏极（14）与NFET2的栅电极（24）耦合。 NFET 1和NFET 2之间的电压差与VDD具有线性关系。 结果，通过适当地选择各个晶体管栅电极区域（A 1）和（A 2）之间的比率，可以在NFET 1和NFET 2之间划分电压VDD。
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公开(公告)号：US07336095B2
公开(公告)日：2008-02-26
申请号：US11760575
申请日：2007-06-08
申请人： Karl R. Erickson , John A. Fifield , Chandrasekharan Kothandaraman , Phil C. Paone , William R. Tonti
发明人： Karl R. Erickson , John A. Fifield , Chandrasekharan Kothandaraman , Phil C. Paone , William R. Tonti
IPC分类号： H03K19/00
CPC分类号： G06F21/71
摘要： Techniques and systems whereby operation of and/or access to particular features of an electronic device may be controlled after the device has left the control of the manufacturer are provided. The operation and/or access may be provided based on values stored in non-volatile storage elements, such as electrically programmable fuses (eFUSES).
摘要翻译： 提供了在设备已经离开制造商的控制之后可以控制电子设备的特定特征的操作和/或访问的技术和系统。 操作和/或访问可以基于存储在诸如电可编程熔丝（eFUSES）的非易失性存储元件中的值来提供。
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公开(公告)号：US07215002B2
公开(公告)日：2007-05-08
申请号：US11051703
申请日：2005-02-04
IPC分类号： H01L29/00
CPC分类号： H01L23/5252 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要： An antifuse device (120) that includes a bias element (124) and an programmable antifuse element (128) arranged in series with one another so as to form a voltage divider having an output node (F) located between the bias and antifuse elements. When the antifuse device is in its unprogrammed state, each of the bias element and antifuse element is non-conductive. When the antifuse device is in its programmed state, the bias element remains non-conductive, but the antifuse element is conductive. The difference in the resistance of the antifuse element between its unprogrammed state and programmed state causes the difference in voltages seen at the output node to be on the order of hundreds of mili-volts when a voltage of 1 V is applied across the antifuse device. This voltage difference is so high that it can be readily sensed using a simple sensing circuit (228).
摘要翻译： 一种反熔丝装置（120），其包括彼此串联布置的偏置元件（124）和可编程反熔丝元件（128），以形成具有位于偏置和反熔丝元件之间的输出节点（F）的分压器。 当反熔丝装置处于其未编程状态时，偏置元件和反熔丝元件中的每一个都是不导电的。 当反熔丝装置处于其编程状态时，偏置元件保持不导电，但是反熔丝元件是导电的。 反熔丝元件在其未编程状态和编程状态之间的电阻差异导致当在反熔断器件上施加1V的电压时，在输出节点处看到的电压差为几百微升。 该电压差非常高以至于可以使用简单的感测电路（228）容易地感测。
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公开(公告)号：US06753590B2
公开(公告)日：2004-06-22
申请号：US10064375
申请日：2002-07-08
IPC分类号： H01L2900
CPC分类号： H01L23/5252 , H01L2924/0002 , H01L2924/3011 , Y10S438/957 , H01L2924/00
摘要： A programmable element that has a first diode having an electrode and a first insulator disposed between the substrate and said electrode of said first device, said first insulator having a first value of a given characteristic, and an FET having an electrode and a second insulator disposed between the substrate and said electrode of said second device, said second insulator having a second value of said given characteristic that is different from said first value. The electrodes of the diode and the FET are coupled to one another, and a source of programming energy is coupled to the diode to cause it to permanently decrease in resistivity when programmed. The programmed state of the diode is indicated by a current in the FET, which is read by a sense latch. Thus a small resistance change in the diode translates to a large signal gain/change in the latch. This allows the diode to be programmed at lower voltages.
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公开(公告)号：US20080094896A1
公开(公告)日：2008-04-24
申请号：US11550918
申请日：2006-10-19
申请人： Karl R. Erickson , John A. Fifield , Chandrasekara Kothandaraman , Phil C. Paone , William R. Tonti
发明人： Karl R. Erickson , John A. Fifield , Chandrasekara Kothandaraman , Phil C. Paone , William R. Tonti
摘要： The embodiments of the invention provide an apparatus, method, etc. for a non volatile memory RAD-hard (NVM-rh) system. More specifically, an IC permanent non-volatile storage element comprises an integrated semiconductor stable reference component, wherein the component is resistant to external radiation. The storage element further comprises e-fuse structures in the component and a sensing circuit coupled to the e-fuse structures. The sensing circuit is adapted to update an external device at a specified time interval to reduce incidence of soft errors and errors due to power failure. Moreover, the sensing circuit is adapted to cease updating the external device to program the e-fuse structures; and, continue updating the external device after programming the e-fuse structures.
摘要翻译： 本发明的实施例提供了一种用于非易失性存储器RAD-hard（NVM-rh）系统的装置，方法等。 更具体地，IC永久性非易失性存储元件包括集成半导体稳定参考元件，其中该元件对外部辐射具有耐受性。 存储元件还包括组件中的e熔丝结构和耦合到电熔丝结构的感测电路。 感测电路适于以特定的时间间隔更新外部设备，以减少由于电源故障引起的软错误和错误的发生。 此外，感测电路适于停止更新外部设备以编程电熔丝结构; 并且在编程电熔丝结构之后继续更新外部设备。
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公开(公告)号：US07268577B2
公开(公告)日：2007-09-11
申请号：US11016220
申请日：2004-12-17
申请人： Karl R. Erickson , John A. Fifield , Chandrasekharan Kothandaraman , Phil C. Paone , William R. Tonti
发明人： Karl R. Erickson , John A. Fifield , Chandrasekharan Kothandaraman , Phil C. Paone , William R. Tonti
IPC分类号： H03K19/00
CPC分类号： G06F21/71
摘要： Techniques and systems whereby operation of and/or access to particular features of an electronic device may be controlled after the device has left the control of the manufacturer are provided. The operation and/or access may be provided based on values stored in non-volatile storage elements, such as electrically programmable fuses (eFUSES).
摘要翻译： 提供了在设备已经离开制造商的控制之后可以控制电子设备的特定特征的操作和/或访问的技术和系统。 操作和/或访问可以基于存储在诸如电可编程熔丝（eFUSES）的非易失性存储元件中的值来提供。
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公开(公告)号：US08184465B2
公开(公告)日：2012-05-22
申请号：US12911379
申请日：2010-10-25
IPC分类号： G11C17/00
CPC分类号： G11C17/16 , H01L23/5256 , H01L2924/0002 , H01L2924/00
摘要： A programmable device includes a substrate (10); an insulator (13) on the substrate; an elongated semiconductor material (12) on the insulator, the elongated semiconductor material having first and second ends, and an upper surface S; the first end (12a) is substantially wider than the second end (12b), and a metallic material is disposed on the upper surface; the metallic material being physically migratable along the upper surface responsive to an electrical current I flowable through the semiconductor material and the metallic material.
摘要翻译： 可编程器件包括衬底（10）; 绝缘体（13）; 绝缘体上的细长半导体材料（12），具有第一和第二端的细长半导体材料和上表面S; 第一端部（12a）比第二端部（12b）大得多，金属材料设置在上表面上; 所述金属材料可响应于流过半导体材料和金属材料的电流I而沿着上表面物理迁移。
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