Programmable semiconductor device
    1.
    发明授权
    Programmable semiconductor device 有权
    可编程半导体器件

    公开(公告)号:US08724365B2

    公开(公告)日:2014-05-13

    申请号:US13427162

    申请日:2012-03-22

    IPC分类号: G11C17/00

    摘要: A programmable device includes a substrate (10); an insulator (13) on the substrate; an elongated semiconductor material (12) on the insulator, the elongated semiconductor material having first and second ends, and an upper surface S; the first end (12a) is substantially wider than the second end (12b), and a metallic material is disposed on the upper surface; the metallic material being physically migratable along the upper surface responsive to an electrical current I flowable through the semiconductor material and the metallic material.

    摘要翻译: 可编程器件包括衬底(10); 绝缘体(13); 绝缘体上的细长半导体材料(12),具有第一和第二端的细长半导体材料和上表面S; 第一端部(12a)比第二端部(12b)大得多,金属材料设置在上表面上; 所述金属材料可响应于流过半导体材料和金属材料的电流I而沿着上表面物理迁移。

    PROGRAMMABLE SEMICONDUCTOR DEVICE
    2.
    发明申请
    PROGRAMMABLE SEMICONDUCTOR DEVICE 有权
    可编程半导体器件

    公开(公告)号:US20120178239A1

    公开(公告)日:2012-07-12

    申请号:US13427162

    申请日:2012-03-22

    IPC分类号: H01L21/768

    摘要: A programmable device includes a substrate (10); an insulator (13) on the substrate; an elongated semiconductor material (12) on the insulator, the elongated semiconductor material having first and second ends, and an upper surface S; the first end (12a) is substantially wider than the second end (12b), and a metallic material is disposed on the upper surface; the metallic material being physically migratable along the upper surface responsive to an electrical current I flowable through the semiconductor material and the metallic material.

    摘要翻译: 可编程器件包括衬底(10); 绝缘体(13); 绝缘体上的细长半导体材料(12),具有第一和第二端的细长半导体材料和上表面S; 第一端部(12a)比第二端部(12b)大得多,金属材料设置在上表面上; 所述金属材料可响应于流过半导体材料和金属材料的电流I而沿着上表面物理迁移。

    PROGRAMMABLE SEMICONDUCTOR DEVICE
    3.
    发明申请
    PROGRAMMABLE SEMICONDUCTOR DEVICE 有权
    可编程半导体器件

    公开(公告)号:US20110032025A1

    公开(公告)日:2011-02-10

    申请号:US12911379

    申请日:2010-10-25

    IPC分类号: H01H37/76 H01L21/768

    摘要: A programmable device includes a substrate (10); an insulator (13) on the substrate; an elongated semiconductor material (12) on the insulator, the elongated semiconductor material having first and second ends, and an upper surface S; the first end (12a) is substantially wider than the second end (12b), and a metallic material is disposed on the upper surface; the metallic material being physically migratable along the upper surface responsive to an electrical current I flowable through the semiconductor material and the metallic material.

    摘要翻译: 可编程器件包括衬底(10); 绝缘体(13); 绝缘体上的细长半导体材料(12),具有第一和第二端的细长半导体材料和上表面S; 第一端部(12a)比第二端部(12b)大得多,金属材料设置在上表面上; 所述金属材料可响应于流过半导体材料和金属材料的电流I而沿着上表面物理迁移。

    Programmable semiconductor device
    4.
    发明授权
    Programmable semiconductor device 有权
    可编程半导体器件

    公开(公告)号:US08184465B2

    公开(公告)日:2012-05-22

    申请号:US12911379

    申请日:2010-10-25

    IPC分类号: G11C17/00

    摘要: A programmable device includes a substrate (10); an insulator (13) on the substrate; an elongated semiconductor material (12) on the insulator, the elongated semiconductor material having first and second ends, and an upper surface S; the first end (12a) is substantially wider than the second end (12b), and a metallic material is disposed on the upper surface; the metallic material being physically migratable along the upper surface responsive to an electrical current I flowable through the semiconductor material and the metallic material.

    摘要翻译: 可编程器件包括衬底(10); 绝缘体(13); 绝缘体上的细长半导体材料(12),具有第一和第二端的细长半导体材料和上表面S; 第一端部(12a)比第二端部(12b)大得多,金属材料设置在上表面上; 所述金属材料可响应于流过半导体材料和金属材料的电流I而沿着上表面物理迁移。

    Programmable semiconductor device
    5.
    发明授权
    Programmable semiconductor device 有权
    可编程半导体器件

    公开(公告)号:US07872897B2

    公开(公告)日:2011-01-18

    申请号:US10552971

    申请日:2003-04-30

    IPC分类号: G11C17/00

    摘要: A programmable device includes a substrate (10); an insulator (13) on the substrate; an elongated semiconductor material (12) on the insulator, the elongated semiconductor material having first and second ends, and an upper surface S; the first end (12a) is substantially wider than the second end (12b), and a metallic material is disposed on the upper surface; the metallic material being physically migratable along the upper surface responsive to an electrical current I flowable through the semiconductor material and the metallic material.

    摘要翻译: 可编程器件包括衬底(10); 绝缘体(13); 绝缘体上的细长半导体材料(12),具有第一和第二端的细长半导体材料和上表面S; 第一端部(12a)比第二端部(12b)大得多,金属材料设置在上表面上; 所述金属材料可响应于流过半导体材料和金属材料的电流I而沿着上表面物理迁移。

    Structure and method for dual gate oxidation for CMOS technology
    6.
    发明授权
    Structure and method for dual gate oxidation for CMOS technology 失效
    用于CMOS技术的双栅极氧化的结构和方法

    公开(公告)号:US06674134B2

    公开(公告)日:2004-01-06

    申请号:US09173430

    申请日:1998-10-15

    IPC分类号: H01L2976

    摘要: The present invention provides an integrated circuit which comprises a substrate having a plurality of device regions formed therein, said plurality of device regions being electrically isolated from each other by shallow trench isolation (STI) regions and said plurality of device regions each having opposing edges abutting its corresponding STI region; selected ones of said devices regions having a preselected first device width such that an oxide layer formed thereon includes substantially thicker perimeter regions, along said opposing edges, compared to a thinner central region that does not abut its corresponding STI region; and selected other ones of the device regions having a preselected device width substantially narrower in width than the first device width such that an oxide layer formed thereon includes perimeter regions, along opposing edges, that abut each other over its central region thereby preventing formation of a corresponding thinner central region.

    摘要翻译: 本发明提供一种集成电路,其包括其中形成有多个器件区的衬底,所述多个器件区通过浅沟槽隔离(STI)区域彼此电隔离,并且所述多个器件区域各自具有相对的边缘邻接 其对应的STI区域; 所选择的所述器件区域具有预先选择的第一器件宽度,使得形成在其上的氧化物层与不相邻其对应的STI区的较薄的中心区域相比,沿着所述相对的边缘包括基本上较厚的周边区域; 以及选定的其它器件区域具有基本上比第一器件宽度窄的宽度的预选器件宽度,使得形成在其上的氧化物层包括沿相对边缘的周边区域,该周边区域在其中心区域上彼此邻接,从而防止形成 相应较薄的中心区域。

    Structure and method for dual gate oxidation for CMOS technology
    7.
    发明授权
    Structure and method for dual gate oxidation for CMOS technology 失效
    用于CMOS技术的双栅极氧化的结构和方法

    公开(公告)号:US06344383B1

    公开(公告)日:2002-02-05

    申请号:US09421853

    申请日:1999-10-20

    IPC分类号: H01L218238

    摘要: The present invention provides an integrated circuit which comprises a substrate having a plurality of device regions formed therein, said plurality of device regions being electrically isolated from each other by shallow trench isolation (STI) regions and said plurality of device regions each having opposing edges abutting its corresponding STI region; selected ones of said devices regions having a preselected first device width such that an oxide layer formed thereon includes substantially thicker perimeter regions, along said opposing edges, compared to a thinner central region that does not abut its corresponding STI region; and selected other ones of the device regions having a preselected device width substantially narrower in width than the first device width such that an oxide layer formed thereon includes perimeter regions, along opposing edges, that abut each other over its central region thereby preventing formation of a corresponding thinner central region.

    摘要翻译: 本发明提供一种集成电路,其包括其中形成有多个器件区的衬底,所述多个器件区通过浅沟槽隔离(STI)区域彼此电隔离,并且所述多个器件区域各自具有相对的边缘邻接 其对应的STI区域; 所选择的所述器件区域具有预先选择的第一器件宽度,使得形成在其上的氧化物层与不相邻其对应的STI区的较薄的中心区域相比,沿着所述相对的边缘包括基本上较厚的周边区域; 以及选定的其它器件区域具有基本上比第一器件宽度窄的宽度的预选器件宽度,使得形成在其上的氧化物层包括沿相对边缘的周边区域,该周边区域在其中心区域上彼此邻接,从而防止形成 相应较薄的中心区域。

    Electronically programmable antifuse and circuits made therewith
    8.
    发明授权
    Electronically programmable antifuse and circuits made therewith 有权
    电子可编程反熔丝和由其制成的电路

    公开(公告)号:US07687883B2

    公开(公告)日:2010-03-30

    申请号:US11627723

    申请日:2007-01-26

    IPC分类号: H01L29/00

    摘要: An antifuse device (120) that includes a bias element (124) and an programmable antifuse element (128) arranged in series with one another so as to form a voltage divider having an output node (F) located between the bias and antifuse elements. When the antifuse device is in its unprogrammed state, each of the bias element and antifuse element is non-conductive. When the antifuse device is in its programmed state, the bias element remains non-conductive, but the antifuse element is conductive. The difference in the resistance of the antifuse element between its unprogrammed state and programmed state causes the difference in voltages seen at the output node to be on the order of hundreds of mili-volts when a voltage of 1 V is applied across the antifuse device. This voltage difference is so high that it can be readily sensed using a simple sensing circuit (228).

    摘要翻译: 一种反熔丝装置(120),其包括彼此串联布置的偏置元件(124)和可编程反熔丝元件(128),以形成具有位于偏置和反熔丝元件之间的输出节点(F)的分压器。 当反熔丝装置处于其未编程状态时,偏置元件和反熔丝元件中的每一个都是不导电的。 当反熔丝装置处于其编程状态时,偏置元件保持不导电,但是反熔丝元件是导电的。 反熔丝元件在其未编程状态和编程状态之间的电阻差异导致当在反熔断器件上施加1V的电压时,在输出节点处看到的电压差为几百微升。 该电压差非常高以至于可以使用简单的感测电路(228)容易地感测。

    High impedance antifuse
    10.
    发明授权
    High impedance antifuse 失效
    高阻抗反熔丝

    公开(公告)号:US07098083B2

    公开(公告)日:2006-08-29

    申请号:US10652534

    申请日:2003-08-29

    IPC分类号: H01L21/82

    摘要: A programmable element that has a first diode having an electrode and a first insulator disposed between the substrate and said electrode of said first device, said first insulator having a first value of a given characteristic, and an FET having an electrode and a second insulator disposed between the substrate and said electrode of said second device, said second insulator having a second value of said given characteristic that is different from said first value. The electrodes of the diode and the FET are coupled to one another, and a source of programming energy is coupled to the diode to cause it to permanently decrease in resistivity when programmed. The programmed state of the diode is indicated by a current in the FET, which is read by a sense latch. Thus a small resistance change in the diode translates to a large signal gain/change in the latch. This allows the diode to be programmed at lower voltages.

    摘要翻译: 一种可编程元件,其具有第一二极管,其具有电极和设置在所述基板和所述第一器件的所述电极之间的第一绝缘体,所述第一绝缘体具有给定特性的第一值,以及设置有电极和第二绝缘体的FET 在所述基板和所述第二装置的所述电极之间,所述第二绝缘体具有与所述第一值不同的所述给定特性的第二值。 二极管和FET的电极彼此耦合,并且编程能量源耦合到二极管,以使其在编程时永久地降低电阻率。 二极管的编程状态由FET中的电流表示,该电流由读出锁存器读取。 因此,二极管中的小电阻变化转换为锁存器中的大信号增益/变化。 这允许二极管在较低的电压下被编程。