公开(公告)号：US20090103636A1

公开(公告)日：2009-04-23

申请号：US12085502

申请日：2005-12-01

申请人： John Sidney Stewart

发明人： John Sidney Stewart

IPC分类号： H04N11/02

CPC分类号： H03M13/6566 ,  H03M13/1105 ,  H03M13/1137

摘要： The disclosed embodiments relate to an apparatus and method for decoding signals in a receiver, such as signals using low density parity check error correction. The apparatus includes a link circuit. The link circuit may include a first memory, a first and second processing block, and also include a first shift circuit for shifting data before entering one of the processing blocks and a second shift circuit for reversing the first shift after exiting the processing block. The link circuit may also include a second memory used for intermediate storage and shared by the first and second processing block. The method includes reading data from a memory, shifting the data prior to processing, processing the data, and then reverse shifting the data prior to writing it back to the memory.

摘要翻译： 所公开的实施例涉及用于对接收机中的信号进行解码的装置和方法，例如使用低密度奇偶校验错误校正的信号。 该装置包括链路电路。 链路电路可以包括第一存储器，第一和第二处理块，并且还包括用于在进入处理块之一之前移位数据的第一移位电路和用于在退出处理块之后反转第一移位的第二移位电路。 链路电路还可以包括用于中间存储并由第一和第二处理块共享的第二存储器。 该方法包括从存储器读取数据，在处理之前移动数据，处理数据，然后在将数据写回存储器之前将数据反向移位。

公开(公告)号：US06275554B1

公开(公告)日：2001-08-14

申请号：US09350880

申请日：1999-07-09

申请人： Aaron Reel Bouillet ,  John Sidney Stewart

发明人： Aaron Reel Bouillet ,  John Sidney Stewart

IPC分类号： H04L2536

CPC分类号： H04N21/2383 ,  H04L7/044 ,  H04L7/08 ,  H04N21/4382

摘要： A receiver for processing a VSB modulated signal containing terrestrial broadcast high definition television information includes an input analog-to-digital converter (19) for producing a digital datastream. A symbol timing recovery and segment sync recovery network (24; FIG. 3, 4) develops a properly timed sampling clock for the digital converter (19). The symbol timing recovery network (310) responds to an output from the segment sync recovery network (328), which in turn responds to an equalized signal from an adaptive channel equalizer (34). A controlled oscillator (336) generates the sampling clock for the digital converter. A control network (340, 344, 348; FIG. 3) shifts the frequency range of the oscillator to maintain desired linear operation to enhance symbol timing acquisition.

摘要翻译： 一种用于处理包含地面广播高分辨率电视信息的VSB调制信号的接收机包括用于产生数字数据流的输入模拟 - 数字转换器（19）。 符号定时恢复和段同步恢复网络（24;图3，4）为数字转换器（19）开发适当定时的采样时钟。 符号定时恢复网络（310）响应来自段同步恢复网络（328）的输出，其响应于来自自适应信道均衡器（34）的均衡信号。 受控振荡器（336）产生数字转换器的采样时钟。 控制网络（340,344,348;图3）移动振荡器的频率范围以维持期望的线性操作以增强符号定时获取。

公开(公告)号：US5898900A

公开(公告)日：1999-04-27

申请号：US798770

申请日：1997-02-11

申请人： Kurt Joseph Richter ,  Michael Anthoney Pugel ,  John Sidney Stewart

发明人： Kurt Joseph Richter ,  Michael Anthoney Pugel ,  John Sidney Stewart

IPC分类号： H04N5/44 ,  H04N7/20

CPC分类号： H04N5/4446 ,  H04H40/90 ,  H04N21/6143 ,  H04N7/20 ,  H04N5/4401

摘要： A tuner of for a digital satellite television receiver comprises a single conversion stage which produces an IF signal at a low enough frequency to permit a SAW filter to be used to perform symbol shaping as well as the normal IF filtering function. The local oscillator is controlled by a phase locked loop tuning control IC normally used to control the local oscillator of a tuner of a conventional broadcast or cable television receiver. In an exemplary embodiment for tuning RF signals provided by a block converter in the 950 to 1450 mHz frequency range, the IF has a center frequency of 140 mHz. A lithium tantalate SAW filter is used in order to minimize shift of the IF center frequency with temperature and to provide the required relative IF bandwidth (i.e., the width of the IF passband divided by the IF center frequency).

摘要翻译： 用于数字卫星电视接收机的调谐器包括单个转换级，其以足够低的频率产生IF信号，以允许SAW滤波器用于执行符号整形以及正常IF滤波功能。 本地振荡器由通常用于控制传统广播或有线电视接收机的调谐器的本地振荡器的锁相环调谐控制IC控制。 在用于调谐在950至1450mHz频率范围内由块转换器提供的RF信号的示例性实施例中，IF具有140mHz的中心频率。 使用钽酸锂SAW滤波器以便最小化IF中心频率随温度的偏移并提供所需的相对IF带宽（即，IF通带的宽度除以IF中心频率）。

公开(公告)号：US5717471A

公开(公告)日：1998-02-10

申请号：US501752

申请日：1995-07-12

申请人： John Sidney Stewart

发明人： John Sidney Stewart

IPC分类号： H03M13/23 ,  H03M13/41 ,  H04L27/00 ,  H04L27/38 ,  H04N5/44 ,  H04N5/455 ,  H04N5/46 ,  H04N21/2383 ,  H04N21/438 ,  H04N9/68

CPC分类号： H03M13/23 ,  H03M13/3961 ,  H03M13/41 ,  H03M13/6362 ,  H03M13/6502 ,  H03M13/6505 ,  H04L27/0008 ,  H04N5/4401

摘要： A Digital signal processor selectively demodulates and decodes signals received from multiple types of transmission channels such as satellite, terrestrial and cable transmission channels. A received signal is representative of compressed digital video information such as television picture information, and is encoded in one of a plurality of coding formats (e.g., trellis or punctured codes of selectable code rate). The received signal is also modulated in one of a plurality of modulation formats (e.g., PAM, QAM or PSK). A demodulator selectively demodulates the signal modulated in one of the plurality of modulation formats, and a decoder selectively decodes the demodulated signal coded in one of the plurality of coding formats.

摘要翻译： 数字信号处理器选择性地解调和解码从诸如卫星，地面和有线传输信道的多种类型的传输信道接收的信号。 接收到的信号代表诸如电视图像信息的压缩数字视频信息，并且以多种编码格式（例如，可选码率的网格或穿孔码）之一进行编码。 所接收的信号也以多种调制格式（例如PAM，QAM或PSK）中的一种调制。 解调器选择性地解调以多种调制格式之一调制的信号，并且解码器选择性地解码以多种编码格式之一编码的解调信号。