公开(公告)号：US20050100104A1

公开(公告)日：2005-05-12

申请号：US10679013

申请日：2003-10-03

Applicant: Timothy Dupuis ,  George Tuttle ,  Jeffrey Scott ,  Navdeep Sooch ,  David Welland

Inventor： Timothy Dupuis ,  George Tuttle ,  Jeffrey Scott ,  Navdeep Sooch ,  David Welland

IPC: H04L7/033 ,  H04L25/06 ,  H04M11/06 ,  H04M19/00 ,  H04L25/00

CPC classification number: H04L25/06 ,  H04L7/033 ,  H04L25/0266 ,  H04M11/06 ,  H04M19/001

Abstract: A digital direct access arrangement (DAA) circuitry may be used to terminate the telephone connections at the user's end that provides a communication path for signals to and from the phone lines. Briefly described, the DAA provides a programmable means for the DC termination for a variety of international phone standards. The invention may also be utilized with means for transmitting and receiving a signal across a capacitive isolation barrier. More particularly, a DC holding circuit is provided in which a programmable DC current limiting mode is available. In the current limiting mode, power may be dissipated in devices external to a DAA integrated circuit. Moreover, much of the power may be dissipated in external passive devices, such as resistors.

Abstract translation: 可以使用数字直接访问布置（DAA）电路来终止在用户端的电话连接，其提供用于到达和来自电话线的信号的通信路径。 简要描述，DAA提供用于各种国际电话标准的DC终端的可编程装置。 本发明还可以用于在电容隔离屏障上传输和接收信号的装置。 更具体地，提供了一种DC可编程直流限流模式可用的直流保持电路。 在限流模式下，功率可能会在DAA集成电路外部的器件中耗散。 此外，大部分功率可能会在外部无源器件（如电阻）中消散。

公开(公告)号：US20050024509A1

公开(公告)日：2005-02-03

申请号：US10862488

申请日：2004-06-07

Applicant: Nadi Itani ,  Caiyi Wang ,  David Welland

Inventor： Nadi Itani ,  Caiyi Wang ,  David Welland

IPC: G06T5/40 ,  H04N5/235 ,  H04N5/243 ,  H04N5/351 ,  H04N5/378 ,  H04N5/20

CPC classification number: H04N5/2352

Abstract: An image processor system for a charge coupled device (CCD) or CMOS imaging system includes a histogram-based automatic gain control (AGC) circuit which first controls gain by adjusting said CCD system and then for yet a higher gain level makes gain adjustments in said CDSVGA circuit and a digital gain circuit to produce a combined target gain level. A processing system for an imager device includes a camera system for producing an imager signal, a correlated double sample (CDS) circuit for receiving data from an imager, a variable gain amplifier (VGA), an analog-to-digital converter (ADC) coupled to said CDS circuit, a digital gain circuit (DGC) coupled to said ADC, and an automatic gain control (AGC) circuit coupled to said DGC for controlling the CDS circuit and the DGC, as well as shutter timing for shutter gain.

Abstract translation: 用于电荷耦合器件（CCD）或CMOS成像系统的图像处理器系统包括基于直方图的自动增益控制（AGC）电路，其首先通过调整所述CCD系统来控制增益，然后对于较高的增益电平进行增益，使所述 CDSVGA电路和数字增益电路，以产生组合的目标增益电平。 一种用于成像器件的处理系统包括用于产生成像器信号的相机系统，用于从成像器接收数据的相关双样本（CDS）电路，可变增益放大器（VGA），模数转换器（ADC） 耦合到所述CDS电路，耦合到所述ADC的数字增益电路（DGC）以及耦合到所述DGC的用于控制CDS电路和DGC的自动增益控制（AGC）电路以及用于快门增益的快门定时。