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公开(公告)号：US20180139015A1
公开(公告)日：2018-05-17
申请号：US15820183
申请日：2017-11-21
Applicant: Intel Corporation
Inventor： Adee O. Ran , Kent C. Lusted
Abstract: One embodiment provides an apparatus. The example apparatus includes a root mean square (RMS) distortion determination module configured to determine an RMS distortion error and a signal to noise and distortion ratio (SNDR), the RMS distortion error determined based, at least in part, on a portion of a transmitted pulse centered at or near a transmitted pulse maximum amplitude and the SNDR determined based, at least in part, on the RMS distortion error.
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公开(公告)号：US10374897B2
公开(公告)日：2019-08-06
申请号：US16044122
申请日：2018-07-24
Applicant: Intel Corporation
Inventor： Kent C. Lusted , Adee O. Ran
IPC: H04L12/28 , H04L12/24 , H04L29/06 , H04L12/935
Abstract: Technologies for autonegotiation of communications operational modes over copper cable include a network port logic having a communication link coupled to a remote link partner. The network port logic may start an autonegotiation protocol upon reset, when the link is broken, or upon manual renegotiation. The network port logic transmits an autonegotiation page to the remote link partner that indicates single-lane communications ability over copper cable. The network port logic receives an autonegotiation page from the link partner indicating single-lane communications ability over copper cable. If the network port logic and link partner have a common single-lane communication ability, the link may be activated. The autonegotiation pages may be base pages or next pages. The single-lane communication ability may be indicated by one or more bits of the autonegotation pages. The link may be established at 1 gigabit or 10 gigabits per second. Other embodiments are described and claimed.
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公开(公告)号：US10069606B2
公开(公告)日：2018-09-04
申请号：US15820183
申请日：2017-11-21
Applicant: Intel Corporation
Inventor： Adee O. Ran , Kent C. Lusted
Abstract: One embodiment provides an apparatus. The example apparatus includes a root mean square (RMS) distortion determination module configured to determine an RMS distortion error and a signal to noise and distortion ratio (SNDR), the RMS distortion error determined based, at least in part, on a portion of a transmitted pulse centered at or near a transmitted pulse maximum amplitude and the SNDR determined based, at least in part, on the RMS distortion error.
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公开(公告)号：US10033586B2
公开(公告)日：2018-07-24
申请号：US14559627
申请日：2014-12-03
Applicant: Intel Corporation
Inventor： Kent C. Lusted , Adee O. Ran
IPC: H04L12/28 , H04L12/24 , H04L29/06 , H04L12/935
Abstract: Technologies for autonegotiation of communications operational modes over copper cable include a network port logic having a communication link coupled to a remote link partner. The network port logic may start an autonegotiation protocol upon reset, when the link is broken, or upon manual renegotiation. The network port logic transmits an autonegotiation page to the remote link partner that indicates single-lane communications ability over copper cable. The network port logic receives an autonegotiation page from the link partner indicating single-lane communications ability over copper cable. If the network port logic and link partner have a common single-lane communication ability, the link may be activated. The autonegotiation pages may be base pages or next pages. The single-lane communication ability may be indicated by one or more bits of the autonegotation pages. The link may be established at 1 gigabit or 10 gigabits per second. Other embodiments are described and claimed.
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公开(公告)号：US09906267B2
公开(公告)日：2018-02-27
申请号：US14887116
申请日：2015-10-19
Applicant: Intel Corporation
Inventor： Richard Mellitz , Adee O. Ran
Abstract: One embodiment provides a network device that includes PHY circuitry comprising transmit circuitry (Tx) and receive circuitry (Rx), wherein the Tx and Rx circuitry are configured to be coupled to a respective channel to communicate with an external device via the channels, wherein the network device configured to communicate with the external device using an Ethernet communications protocol; and test circuitry. The test circuitry is configured to: designate a through channel and at least one crosstalk channel from among the channels; determine, in the time domain, an approximate available signal voltage of a first response signal, wherein the first response signal is in response to a test signal applied to the through channel; determine a first noise profile of the first response signal in response to the test signal applied on the through channel; determine a second noise profile of a second response signal, wherein the second response signal is in response to the test signal applied on a crosstalk channel and measured on the through channel; and determine a signal-to-noise ratio of the through channel based on, at least in part, the approximate available signal voltage and the first and second noise profiles.
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Patent Agency Ranking
公开(公告)号：US20160149675A1
公开(公告)日：2016-05-26
申请号：US14949036
申请日：2015-11-23
Applicant: Intel Corporation
Inventor： Adee O. Ran , Kent C. Lusted
IPC: H04L1/24
Abstract: One embodiment provides an apparatus. The example apparatus includes a root mean square (RMS) distortion determination module configured to determine an RMS distortion error and a signal to noise and distortion ratio (SNDR), the RMS distortion error determined based, at least in part, on a portion of a transmitted pulse centered at or near a transmitted pulse maximum amplitude and the SNDR determined based, at least in part, on the RMS distortion error.
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27.发明授权De-correlating training pattern sequences between lanes in high-speed multi-lane links and interconnects 有权在高速多车道链路和互连线路之间去相关的训练模式序列公开(公告)号：US09344146B2
公开(公告)日：2016-05-17
申请号：US13793063
申请日：2013-03-11
Applicant: Intel Corporation
Inventor： Kent C. Lusted , Adee O. Ran
CPC classification number: H04B3/40 , H04L5/1438 , H04L25/0204 , H04L25/0226
Abstract: Methods, apparatus and systems for de-correlating training pattern sequences for high-speed links and interconnects. The high-speed links and interconnects employs multiple lanes in each direction for transmitting and receiving data, and may be physically implemented via signal paths in an inter-plane board such as a backplane or mid-plane, or via a cable. During link training, a training pattern comprising a pseudo random bit sequence (PBRS) is sent over each lane. The PBRS for each lane is generated by a PBRS generator based on a PRBS polynomial that is unique to that lane. Since each lane employs a different PRBS polynomial, the training patterns between lanes are substantially de-correlated. Link negotiation may be performed between link endpoints to ensure that the PBRS polynomials used for all of the lanes in the high-speed link or interconnect are unique. Exemplary uses include Ethernet links, Infiniband links, and multi-lane serial interconnects.
Abstract translation: 用于高速链路和互连的训练模式序列去相关的方法，装置和系统。 高速链路和互连在每个方向上采用多个通道用于发送和接收数据，并且可以通过诸如背板或中间平面之间的平面板中的信号路径或经由电缆物理地实现。 在链路训练期间，通过每个通道发送包括伪随机位序列（PBRS）的训练模式。 每个通道的PBRS由PBRS发生器基于该通道唯一的PRBS多项式生成。 由于每个车道采用不同的PRBS多项式，车道之间的训练模式基本上是不相关的。 可以在链路端点之间执行链路协商，以确保用于高速链路或互连中所有通道的PBRS多项式是唯一的。 示例性用途包括以太网链路，Infiniband链路和多通道串行互连。
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公开(公告)号：US09112722B2
公开(公告)日：2015-08-18
申请号：US13870186
申请日：2013-04-25
Applicant: INTEL CORPORATION
Inventor： Kent C. Lusted , Adee O. Ran
IPC: H04L12/413 , H04L7/10
CPC classification number: H04L12/413 , H04L7/10
Abstract: Methods, apparatus and systems for implementing Physical Media Attachment (PMA) alignment and rapid transition from a link training mode to a data mode for next-generation high-speed Ethernet links including a 100 Gbps Ethernet link. Training frames are transmitted between first and second Ethernet interfaces on opposing ends of the link in a pair-wise manner, with a first training frame being sent from a first Ethernet interface and a second training frame being returned from the second Ethernet interface. The training frames have a length that is the same as the length of Physical Media Attachment (PMA) frames, and the returned training frames include receiver readiness status indicia identifying a readiness status of a local receiver port, and countdown data. The readiness status indicia, and countdown data are employed to facilitate a rapid transition from the link training mode to the data mode.
Abstract translation: 实现物理媒体附件（PMA）对齐的方法，装置和系统以及从链路训练模式到包括100Gbps以太网链路的下一代高速以太网链路的数据模式的快速切换。 训练帧以成对的方式在链路的相对端上的第一和第二以太网接口之间传输，第一训练帧从第一以太网接口发送，第二训练帧从第二以太接口返回。 训练帧的长度与物理媒体附件（PMA）帧的长度相同，返回的训练帧包括识别本地接收机端口准备状态的接收器准备状态标志和倒计时数据。 采用准备状态标记和倒计时数据来促进从链接训练模式到数据模式的快速转换。
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公开(公告)号：US20150186201A1
公开(公告)日：2015-07-02
申请号：US14520884
申请日：2014-10-22
Applicant: Intel Corporation
Inventor： Adee O. Ran
CPC classification number: H04L1/0083
Abstract: Methods, apparatus and systems implementing robust link training processes and protocols. A first timer is implemented in a training state machine to detect timely responses to incoming requests when frame_lock is TRUE. A second timer is implemented to ensure the initial acquisition and re-acquisition of frame_lock occur within reasonable times. Additionally, no changes of coefficient field values in outgoing requests may occur when frame_lock is FALSE. Through use of the timers, the maximum times to acquire and re-acquire frame_lock are specified in combination with compliant escape paths that are added to the training state diagram. Under the time requirements, re-acquisition is fast, to prevent starvation of the control channel, while the time requirement for initial acquisition is longer in consideration of other start-up activities that are being performed concurrently.
Abstract translation: 实现鲁棒链路训练过程和协议的方法，设备和系统。 第一个定时器在训练状态机中实现，以便在frame_lock为TRUE时及时响应输入的请求。 实现第二个定时器，以确保frame_lock的初始采集和重新采集在合理的时间内发生。 此外，当frame_lock为FALSE时，不会发生传出请求中的系数字段值的更改。 通过使用定时器，获取和重新获取frame_lock的最大时间与添加到训练状态图中的符合转义路径相结合。 在时间要求下，重新采购速度快，防止控制频道的匮乏，而考虑到同时进行的其他启动活动，初始采集的时间要求较长。
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公开(公告)号：US09031093B2
公开(公告)日：2015-05-12
申请号：US13758259
申请日：2013-02-04
Applicant: Intel Corporation
Inventor： Kent C. Lusted , Adee O. Ran
CPC classification number: H04L12/12 , H04L12/40039 , H04L12/40136 , Y02D50/10 , Y02D50/40 , Y02D50/42
Abstract: Methods, apparatus and systems for implementing for implementing Energy-Efficient Ethernet (EEE) refresh and wake signaling for high-speed Ethernet links. During an EEE refresh or wake signaling period, ALERT frames are transmitted between first and second Ethernet interfaces on opposing ends of the link, with a first ALERT frame being sent from a first Ethernet interface and a second ALERT frame being returned from the second Ethernet interface. The ALERT frames have a length that is different that the length of Physical Media Attachment (PMA) frames, and the returned ALERT frames include frame alignment offset data identifying a relative offset between an ALERT frame and a predetermined location in a PMA frame, and countdown data. The frame alignment offset data and countdown data are employed to facilitate a rapid transition from the link training mode to the data mode.
Abstract translation: 用于实现高速以太网链路的高效以太网（EEE）刷新和唤醒信号的实现方法，装置和系统。 在EEE刷新或唤醒信令期间，ALERT帧在链路的相对端的第一和第二以太网接口之间传输，第一ALERT帧从第一以太网接口发送，第二ALERT帧从第二以太网接口返回 。 ALERT帧的长度与物理媒体附件（PMA）帧的长度不同，并且返回的ALERT帧包括标识ALERT帧和PMA帧中的预定位置之间的相对偏移的帧对准偏移数据，以及倒计时 数据。 采用帧对准偏移数据和倒计数数据来促进从链接训练模式到数据模式的快速转变。
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