公开(公告)号：US20220157708A1

公开(公告)日：2022-05-19

申请号：US17099823

申请日：2020-11-17

Applicant: Intel Corporation

Inventor： Leonard P. Guler ,  Charles Henry Wallace ,  Paul A. Nyhus

IPC: H01L23/522 ,  H01L23/50 ,  H01L23/14 ,  H01L23/528 ,  H01L21/768

Abstract: Methods for fabricating an IC structure, e.g., for fabricating a metallization stack portion of an IC structure, as well as related semiconductor devices, are disclosed. An example fabrication method includes splitting metal lines that are supposed to be included at a tight pitch in a single metallization layer into two vertically-stacked layers (hence the term “vertical metal splitting”) by using helmets and wrap-around dielectric spacers. Metal lines split into two such layers may be arranged at a looser pitch in each layer, compared to the pitch at which metal lines of the same size would have to be arranged if there were included in a single layer. Increasing the pitch of metal lines may advantageously allow decreasing the parasitic metal-to-metal capacitance associated with the metallization stack.