SINGLE-ENDED-MODE TO MIXED-MODE TRANSFORMER SPICE CIRCUIT MODEL FOR HIGH-SPEED SYSTEM SIGNAL INTEGRITY SIMULATIONS

    公开(公告)号:US20170242946A1

    公开(公告)日:2017-08-24

    申请号:US15047002

    申请日:2016-02-18

    Inventor: Zhaoqing Chen

    CPC classification number: G06F17/5036 G06F17/5045 G06F17/5068 G06F17/5077

    Abstract: A method of forming a mixed mode response from a single ended mode input includes modeling a first voltage controlled current source based on relative values of a vpositive input signal and a vnegative input signal and modeling a second voltage controlled current source based on relative values of the vpositive input signal and the vnegative input signal. A method of forming a single ended mode response from a mixed mode input modeling a first voltage controlled current source based on relative values of a vDIFFin input signal and a vCOMMin input signal and modeling a second voltage controlled current source based on relative values of the vDIFFin input signal and the vCOMMin input signal, the second voltage controlled being connected to ground through a second terminating impedance that is equal to the reference impedance (Z0).

    SPICE CIRCUIT MODEL FOR TWINAXIAL CABLE

    公开(公告)号:US20170091363A1

    公开(公告)日:2017-03-30

    申请号:US15367276

    申请日:2016-12-02

    Inventor: Zhaoqing Chen

    CPC classification number: G06F17/5036 G06F17/504 G06F17/5045 G06F2217/36

    Abstract: A method to generate a reduced delay twinaxial SPICE model is provided. The method may include measuring near-end S-parameter components and far-end S-parameter components of a twinaxial cable, reducing an original time delay of the far-end S-parameter components by multiplying each of the far-end S-parameter components by a complex exponential based on an equivalent delay length, a signal frequency, and an effective dielectric constant, simulating a signal transmitted across a twinaxial cable by running a 4-port SPICE model using the near-end S-parameter components and the multiplied far-end S-parameter components, and recording a magnitude and a phase of the transmitted signal with respect to frequency as outputs of the reduced delay twinaxial SPICE model.

    Single-ended-mode to mixed-mode transformer spice circuit model for high-speed system signal integrity simulations

    公开(公告)号:US11120189B2

    公开(公告)日:2021-09-14

    申请号:US15946805

    申请日:2018-04-06

    Inventor: Zhaoqing Chen

    Abstract: A method of forming a mixed mode response from a single ended mode input includes modeling a first voltage controlled current source based on relative values of a vpositive input signal and a vnegative input signal and modeling a second voltage controlled current source based on relative values of the vpositive input signal and the vnegative input signal. A method of forming a single ended mode response from a mixed mode input modeling a first voltage controlled current source based on relative values of a vDIFFin input signal and a vCOMMin input signal and modeling a second voltage controlled current source based on relative values of the vDIFFin input signal and the vCOMMin input signal, the second voltage controlled being connected to ground through a second terminating impedance that is equal to the reference impedance (Z0).

    SINGLE-ENDED-MODE TO MIXED-MODE TRANSFORMER SPICE CIRCUIT MODEL FOR HIGH-SPEED SYSTEM SIGNAL INTEGRITY SIMULATIONS

    公开(公告)号:US20180225401A1

    公开(公告)日:2018-08-09

    申请号:US15946805

    申请日:2018-04-06

    Inventor: Zhaoqing Chen

    CPC classification number: G06F17/5036 G06F17/5045 G06F17/5068 G06F17/5077

    Abstract: A method of forming a mixed mode response from a single ended mode input includes modeling a first voltage controlled current source based on relative values of a vpositive input signal and a vnegative input signal and modeling a second voltage controlled current source based on relative values of the vpositive input signal and the vnegative input signal. A method of forming a single ended mode response from a mixed mode input modeling a first voltage controlled current source based on relative values of a vDIFFin input signal and a vCOMMin input signal and modeling a second voltage controlled current source based on relative values of the vDIFFin input signal and the vCOMMin input signal, the second voltage controlled being connected to ground through a second terminating impedance that is equal to the reference impedance (Z0).

    Data clocked retimer model
    27.
    发明授权

    公开(公告)号:US09984189B2

    公开(公告)日:2018-05-29

    申请号:US15047152

    申请日:2016-02-18

    Inventor: Zhaoqing Chen

    CPC classification number: G06F17/5036 G06F2217/78 G06F2217/84

    Abstract: A method of analyzing a transient response of an electronic circuit is includes: forming a model of a retimer that includes a data clocked latch; providing a latch input signal at the input of the model; forming an output signal based on the latch input signal with the voltage controlled voltage source, wherein the voltage controlled voltage source provides a high output when the latch input signal passes through a low to high transition value and continues to provide the high output until the latch input signal passes through a high to low transition value.

    Spice circuit model for twinaxial cable

    公开(公告)号:US09703908B2

    公开(公告)日:2017-07-11

    申请号:US15367290

    申请日:2016-12-02

    Inventor: Zhaoqing Chen

    CPC classification number: G06F17/5036 G06F17/504 G06F17/5045 G06F2217/36

    Abstract: A method to generate a reduced delay twinaxial SPICE model is provided. The method may include measuring near-end S-parameter components and far-end S-parameter components of a twinaxial cable, reducing an original time delay of the far-end S-parameter components by multiplying each of the far-end S-parameter components by a complex exponential based on an equivalent delay length, a signal frequency, and an effective dielectric constant, simulating a signal transmitted across a twinaxial cable by running a 4-port SPICE model using the near-end S-parameter components and the multiplied far-end S-parameter components, and recording a magnitude and a phase of the transmitted signal with respect to frequency as outputs of the reduced delay twinaxial SPICE model.

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