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公开(公告)号：US11658378B2
公开(公告)日：2023-05-23
申请号：US16600760
申请日：2019-10-14
发明人： Joshua C. Myers , Jose A. Hejase , Junyan Tang , Pavel Roy Paladhi , Wiren D. Becker , Sungjun Chun , Daniel M. Dreps
CPC分类号： H01P5/024 , H01P3/121 , H05K1/0215 , H05K1/0246 , H05K1/116 , H05K2201/037
摘要： Methods and apparatuses for vertically transitioning signals between substrate integrated waveguides within a multilayered printed circuit board (PCB) are disclosed. A first substrate integrated waveguide (SIW) is provided in a first layer of the PCB, the first SIW having a first terminal portion. A second SIW is provided in a second layer of the PCB, the second SIW having a second terminal portion that overlaps with the first terminal portion, wherein a first ground plane separates the first SIW and the second SIW. A vertical transition comprising an aperture in the first ground plane that is disposed in an area defined by the overlap of the first terminal portion and the second terminal portion, such that a signal propagated in the first SIW transitions to the second SIW in a different layer through the aperture.
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公开(公告)号：US20230420394A1
公开(公告)日：2023-12-28
申请号：US17808221
申请日：2022-06-22
发明人： Anil Yuksel , Jose A. Hejase , Junyan Tang , Pavel Roy Paladhi , Joshua Myers
IPC分类号： H01L23/66 , H01L23/473 , H01P3/16
CPC分类号： H01L23/66 , H01L23/473 , H01P3/16 , H01L2223/6627
摘要： A multi-chip package structure is provided. The multi-chip package structure includes a first IC chip and a second IC chip, and a fluid conduit thermally coupled to the first IC chip and the second IC chip. The multi-chip package structure is configured to remove heat generated by at least one of the first IC chip and the second IC chip. The fluid conduit has a first end and a second end opposite to the first end. The multi-chip package structure also includes a first monopole feed connected between the first IC chip and the first end of the fluid conduit, and a second monopole feed connected between the second IC chip and the second end of the fluid conduit. The first monopole feed is configured to transmit an electromagnetic signal through the fluid conduit toward the second monopole feed and vice versa.
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公开(公告)号：US20180113974A1
公开(公告)日：2018-04-26
申请号：US15299546
申请日：2016-10-21
发明人： Dylan J. Boday , Zhaoqing Chen , Jose A. Hejase , Roger S. Krabbenhoft , Pavel Roy Paladhi , Junyan Tang
CPC分类号： G06F17/5077 , G06F17/5009 , G06F2217/06 , G06N3/084 , G06N7/005
摘要： Mechanisms are provided for implementing a skew rate artificial neural network (ANN). The mechanisms generate a training dataset for training the skew rate ANN. The training dataset comprises a plurality of sets of data and each set of data corresponds to a particular set of printed circuit board (PCB) and communication channel characteristics. The mechanisms train the skew rate ANN based on the training dataset to generate a trained skew rate ANN. The mechanisms then receive an input dataset representing a set of PCB and communication channel characteristics for a PCB design. The trained skew rate ANN generates a predicted skew factor for the PCB design based on the input dataset. The predicted skew factor is then output to a PCB design tool to modify the PCB design based on the predicted skew factor.
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公开(公告)号：US20240008186A1
公开(公告)日：2024-01-04
申请号：US17854766
申请日：2022-06-30
发明人： Yanyan Zhang , Mahesh Bohra , Wiren Dale Becker , Nam Huu Pham , Pavel Roy Paladhi , Daniel Mark Dreps , Lloyd Andre Walls
CPC分类号： H05K3/0047 , H05K3/429 , H05K1/115
摘要： A gang drilling machine for drilling a circuit card includes a pair of n and p master drills that are configured to be aligned in registry with respective n and p test vias of the card; pluralities of n and p minion drills that are configured to be aligned in registry with pluralities of n and p live vias of the card; and a controller that is electrically connected to control the n and p master drills and minion drills, and to send and receive electrical signals to and from the card. The controller is configured to: send a query signal to the card; monitor a response signal from the card; determine drilling depth of at least one of the master drills, in response to comparing the response signal to the query signal; and adjust operation of the machine, in response to the determined drilling depth.
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公开(公告)号：US11157274B2
公开(公告)日：2021-10-26
申请号：US16695288
申请日：2019-11-26
IPC分类号： G06F9/22 , G05B19/042
摘要： A computer uses an active cable architecture to control communications. The computer sends a first set of instructions for completion of an activity to a first micro-controller of an active communication cable. The computer determines that at least one transceiver of an active cable is to receive a set of signals from the first micro-controller. The computer forms a communication connection between the first micro-controller and the at least one transceiver. The computer sends a second set of instructions to the at least one transceiver, wherein the second set of instructions instruct the at least one transceiver to complete at least a portion of the activity.
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公开(公告)号：US20190170809A1
公开(公告)日：2019-06-06
申请号：US15830051
申请日：2017-12-04
摘要： An apparatus, multi-layer semiconductor substrate and system for testing a high-speed signal through a printed circuit board is provided. Embodiment of the present invention provides an apparatus comprises a multi-layer substrate, one or more transmission lines disposed within the multi-layer substrate, one or more connectors attached to the multi-layer substrate for connecting one or more test cards, a lid, comprising one or more cutouts for the one or more connectors, a clamp for compressing the multi-layer substrate against the lid, and one or more high-speed connectors attached to the one or more test cards, respectively.
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公开(公告)号：US11177665B2
公开(公告)日：2021-11-16
申请号：US16695398
申请日：2019-11-26
IPC分类号： H02J4/00 , G05B19/042
摘要： A computer controls voltage supply for a system that includes a plurality of active cables. The computer determines that a first voltage source included in a first cable has failed to provide a required amount of voltage to the first cable. The computer switches the first cable to a second voltage source included in a second cable. The second voltage source provides voltage to the first cable.
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公开(公告)号：US20210159707A1
公开(公告)日：2021-05-27
申请号：US16695398
申请日：2019-11-26
IPC分类号： H02J4/00 , G05B19/042
摘要： A computer controls voltage supply for a system that includes a plurality of active cables. The computer determines that a first voltage source included in a first cable has failed to provide a required amount of voltage to the first cable. The computer switches the first cable to a second voltage source included in a second cable. The second voltage source provides voltage to the first cable.
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公开(公告)号：US20210157579A1
公开(公告)日：2021-05-27
申请号：US16695288
申请日：2019-11-26
IPC分类号： G06F9/22
摘要： A computer uses an active cable architecture to control communications. The computer sends a first set of instructions for completion of an activity to a first micro-controller of an active communication cable. The computer determines that at least one transceiver of an active cable is to receive a set of signals from the first micro-controller. The computer forms a communication connection between the first micro-controller and the at least one transceiver. The computer sends a second set of instructions to the at least one transceiver, wherein the second set of instructions instruct the at least one transceiver to complete at least a portion of the activity.
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公开(公告)号：US10705134B2
公开(公告)日：2020-07-07
申请号：US15830051
申请日：2017-12-04
摘要： An apparatus, multi-layer semiconductor substrate and system for testing a high-speed signal through a printed circuit board is provided. Embodiment of the present invention provides an apparatus comprises a multi-layer substrate, one or more transmission lines disposed within the multi-layer substrate, one or more connectors attached to the multi-layer substrate for connecting one or more test cards, a lid, comprising one or more cutouts for the one or more connectors, a clamp for compressing the multi-layer substrate against the lid, and one or more high-speed connectors attached to the one or more test cards, respectively.
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