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公开(公告)号:US11196382B1
公开(公告)日:2021-12-07
申请号:US17064378
申请日:2020-10-06
Applicant: Infineon Technologies AG
Inventor: Fabio Padovan , Matteo Bassi , Giovanni Boi , Dmytro Cherniak , Luigi Grimaldi
IPC: H03B5/12
Abstract: An oscillator includes: a first inductor; and a programmable capacitor bank coupled between a first terminal of the first inductor and a second terminal of the first inductor, where the programmable capacitor bank includes a plurality of cells concatenated together, where each cell of the plurality of cells includes a first node, a second node, a third node, a second inductor, and a programmable capacitor, where the second inductor is coupled between the first node and the third node, and the programmable capacitor is coupled between the third node and the second node, where a first inductance of the first inductor is larger than a sum of the inductances of the second inductors of the programmable capacitor bank.
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公开(公告)号:US20210173070A1
公开(公告)日:2021-06-10
申请号:US16705690
申请日:2019-12-06
Applicant: Infineon Technologies AG , POLITECNICO DI MILANO
Inventor: Dmytro Cherniak , Salvatore Levantino , Mario Mercandelli
Abstract: Systems, methods, and circuitries are provided for generating a frequency hopping radar signal. In one example, a radar signal modulator include a frequency offset generator, a phase locked loop, and a bandwidth compensation circuitry. The frequency offset generator is configured to generate a sequence of frequency offsets. The bandwidth compensation circuitry is configured to combine a modulation signal and the sequence of frequency offsets to generate a bandwidth compensated signal. The PLL is configured to receive the bandwidth compensated signal and generate a frequency hopping radar signal based on the bandwidth compensated signal.
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公开(公告)号:US10944410B1
公开(公告)日:2021-03-09
申请号:US16806500
申请日:2020-03-02
Applicant: Infineon Technologies AG
Inventor: Alessandro Garghetti , Luigi Grimaldi , Matteo Bassi , Dmytro Cherniak
Abstract: In accordance with an embodiment, a ring oscillator includes a plurality of stages coupled in a ring configuration, where stage of the plurality of stages has an input node coupled to an output node of a previous stage of the plurality of stages. Each stage of the plurality of stages includes: a ring oscillator transistor having a control node coupled to the input node, and a load path coupled to the output node; a direct injection circuit having a load path coupled between the control node of the ring oscillator transistor and the output node, and a control node coupled to a first oscillator input node; and a tail injection circuit having a load path coupled between the output node and a first power supply node, and a control node coupled to a second oscillator input node.
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公开(公告)号:US20210025924A1
公开(公告)日:2021-01-28
申请号:US16520978
申请日:2019-07-24
Applicant: Infineon Technologies AG
Inventor: Matteo Bassi , Giovanni Boi , Dmytro Cherniak , Fabio Padovan
Abstract: A calibration circuit for calibrating a peak detector configured to detect a signal peak amplitude of an oscillator, including: a calibration oscillator configured to be supplied by at least two different supply voltages to generate respective calibration signals; a calibration peak detector configured to detect a calibration signal peak amplitude of each of the calibration signals; and a logic circuit configured to calibrate the peak detector based on the detected calibration signal peak amplitudes.
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公开(公告)号:US20190158022A1
公开(公告)日:2019-05-23
申请号:US15820029
申请日:2017-11-21
Applicant: Infineon Technologies AG
Inventor: Vadim Issakov , Fabio Padovan , Dmytro Cherniak
IPC: H03B5/12
Abstract: In accordance with an embodiment, a method of operating a voltage controlled oscillator (VCO) that having a VCO core coupled to a filtered current source includes setting an oscillation frequency of the VCO core based on a tuning signal received at a tuning signal input; and setting a resonant frequency of the filtered current source based on the received tuning signal using a tuning circuit having an input directly connected to the tuning signal input
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