-
公开(公告)号：US11005485B2
公开(公告)日：2021-05-11
申请号：US16447599
申请日：2019-06-20
发明人： Mateo Bassi , Fabio Padovan
摘要： A frequency multiplier comprises a phase generator configured to receive an oscillation signal and to provide at phase generator outputs versions of the oscillation signal, which are phase-shifted with respect to each other. An injection-locked ring oscillator comprises a plurality of stages, wherein each of the phase generator outputs is coupled to a different stage of the plurality of stages for multi-point injection. A combiner combines output signals of the plurality of stages of the injection-locked ring oscillator into a signal having a frequency which is a multiple of a frequency of the oscillation signal.
-
公开(公告)号：US11909405B1
公开(公告)日：2024-02-20
申请号：US18151861
申请日：2023-01-09
发明人： Luigi Grimaldi , Thomas Bauernfeind , Dmytro Cherniak , Fabio Versolatto , Andrew Wightwick , Fabio Padovan , Giovanni Boi
摘要： A digital phase-locked loop (DPLL) circuit includes: a first time-to-digital converter (TDC) and a first digital loop filter (DLF) that are configured to be coupled between a reference clock source and a digitally controlled oscillator (DCO), where the first TDC is configured to, during an acquisition mode, generate a phase error by: receiving a reference clock signal from the reference clock source; receiving a clock signal that is based on an output of the DCO divided by a dividing factor, computing a phase error using the reference clock signal and the clock signal; detecting cycle slipping in the computed phase error; and in response to detecting the cycle slipping, modifying the computed phase error to reduce the impact of cycle slipping on the DPLL circuit; and a first frequency divider circuit configured to generate the clock signal by dividing the output of the DCO by the dividing factor.
-
公开(公告)号：US11831279B2
公开(公告)日：2023-11-28
申请号：US17227755
申请日：2021-04-12
发明人： David Seebacher , Matteo Bassi , Dmytro Cherniak , Fabio Padovan
CPC分类号： H03F1/0205 , H03F3/245 , H03F2200/294 , H03F2200/451
摘要： In accordance with an embodiment, a method for operating a millimeter-wave power amplifier including an input transistor having an output node coupled to a load path of a cascode transistor includes: receiving a millimeter-wave transmit signal at a control node of the input transistor; amplifying the millimeter-wave transmit signal to form an output signal; providing the output signal to a load coupled to an output node of the cascode transistor; and adjusting a first DC bias current of the input transistor to form a substantially constant second DC bias current of the cascode transistor.
-
公开(公告)号：US10673442B2
公开(公告)日：2020-06-02
申请号：US16203857
申请日：2018-11-29
摘要： An integrated circuit is described herein. In accordance with one embodiment, the circuit includes a voltage controlled oscillator (VCO) that is configured to receive a tuning voltage at a tuning input and to provide an RF oscillator signal at an oscillator output. The circuit further includes a first and a second switchable resistor network. The first switchable resistor network includes at least a first resistor and at least a first switch and is connected between the tuning input of the VCO and a first node, which operably provides a first voltage. The second switchable resistor network includes at least a second resistor and at least a second switch and is connected between the tuning input of the VCO and a second node, which operably provides a second voltage. Furthermore, the circuit includes a control circuit that is configured to activate, dependent on a control signal, either the first switchable resistor network, the second switchable resistor network or both, the first and the second resistor networks.
-
公开(公告)号：US11184013B1
公开(公告)日：2021-11-23
申请号：US17181366
申请日：2021-02-22
发明人： Luigi Grimaldi , Giovanni Boi , Dmytro Cherniak , Fabio Padovan
摘要： A method of operating a phase-locked loop (PLL) having a dynamic element matching (DEM)-driven digitally controlled oscillator (DCO) includes calibrating the PLL, where calibrating the PLL includes opening a loop of the PLL and performing linearity measurements of the DEM-driven DCO when the loop of the PLL is open and when dynamic matching of the DEM-driven DCO is activated, where performing the linearity measurements includes: applying test control words to the DEM-driven DCO to obtain frequencies in a first range of frequencies; and measuring output frequencies of the DEM-driven DCO corresponding to the test control words. Calibrating the PLL further includes calculating calibration information based on the test control words and the measured output frequencies.
-
公开(公告)号：US10367452B2
公开(公告)日：2019-07-30
申请号：US15461203
申请日：2017-03-16
发明人： Vadim Issakov , Fabio Padovan
IPC分类号： H03B5/12
摘要： In accordance with an embodiment, a method of operating a voltage controlled oscillator (VCO) includes generating a first oscillating signal in a first VCO core and generating a second oscillating signal in a second VCO core, such that the first oscillating signal and the second oscillating signal have a same frequency and a fixed phase offset. The VCO includes the first VCO core and the second VCO core, and each VCO core includes a pair of transistors. The VCO also includes a transformer having a first winding coupled between control nodes of the pair of transistors of the first VCO core and a second winding coupled between control nodes of the pair of transistors of the second VCO core.
-
公开(公告)号：US20190190524A1
公开(公告)日：2019-06-20
申请号：US16203857
申请日：2018-11-29
摘要： An integrated circuit is described herein. In accordance with one embodiment, the circuit includes a voltage controlled oscillator (VCO) that is configured to receive a tuning voltage at a tuning input and to provide an RF oscillator signal at an oscillator output. The circuit further includes a first and a second switchable resistor network. The first switchable resistor network includes at least a first resistor and at least a first switch and is connected between the tuning input of the VCO and a first node, which operably provides a first voltage. The second switchable resistor network includes at least a second resistor and at least a second switch and is connected between the tuning input of the VCO and a second node, which operably provides a second voltage. Furthermore, the circuit includes a control circuit that is configured to activate, dependent on a control signal, either the first switchable resistor network, the second switchable resistor network or both, the first and the second resistor networks.
-
公开(公告)号：US11079415B2
公开(公告)日：2021-08-03
申请号：US16520978
申请日：2019-07-24
发明人： Matteo Bassi , Giovanni Boi , Dmytro Cherniak , Fabio Padovan
摘要： A calibration circuit for calibrating a peak detector configured to detect a signal peak amplitude of an oscillator, including: a calibration oscillator configured to be supplied by at least two different supply voltages to generate respective calibration signals; a calibration peak detector configured to detect a calibration signal peak amplitude of each of the calibration signals; and a logic circuit configured to calibrate the peak detector based on the detected calibration signal peak amplitudes.
-
公开(公告)号：US10855296B2
公开(公告)日：2020-12-01
申请号：US16585689
申请日：2019-09-27
发明人： Matteo Bassi , Giovanni Boi , Dmytro Cherniak , Fabio Padovan
摘要： A circuit for calibrating an injection locked oscillator is provided. The injection locked oscillator includes an injection locking input, an LC tank and an oscillator output to output an oscillator output signal. The circuit is configured to adjust a capacitance of the LC tank to different values, detect an amplitude of the oscillator output signal for each value of the different values of the capacitance while an input signal having a target frequency is applied to the injection locking input, determine a maximum amplitude of the detected amplitudes, and select a value for operating the injection locked oscillator based on the determined maximum amplitude.
-
公开(公告)号：US20180269833A1
公开(公告)日：2018-09-20
申请号：US15461203
申请日：2017-03-16
发明人： Vadim Issakov , Fabio Padovan
IPC分类号： H03B5/12
CPC分类号： H03B5/1231 , H03B5/1243 , H03B5/1293 , H03B5/1296 , H03B2200/0008 , H03B2200/004 , H03B2200/009
摘要： In accordance with an embodiment, a method of operating a voltage controlled oscillator (VCO) includes generating a first oscillating signal in a first VCO core and generating a second oscillating signal in a second VCO core, such that the first oscillating signal and the second oscillating signal have a same frequency and a fixed phase offset. The VCO includes the first VCO core and the second VCO core, and each VCO core includes a pair of transistors. The VCO also includes a transformer having a first winding coupled between control nodes of the pair of transistors of the first VCO core and a second winding coupled between control nodes of the pair of transistors of the second VCO core.
-
-
-
-
-
-
-
-
-
搜索结果
14 条记录 (耗时 0.014 秒)
