Abstract:
A top emission inverted OLED device is disclosed. The a top emission inverted OLED device includes: first and second pad portions disposed on peripheral areas which correspond to outer sides of a light generation area on a metal substrate; at least one thin film transistor formed on the light generation area; a passivation layer formed to cover the thin film transistor on the metal substrate and include contact holes which partially expose the thin film transistor and the first and second pad portions; a stacked pattern of first and second conductive patterns formed on the passivation layer and configured to make contact with the exposed part of the thin film transistor through one of the contact holes; a cathode electrode formed on the light generation area and electrically connected to the second conductive pattern; an organic light emission layer disposed on the cathode electrode; an anode electrode disposed on the organic light emission layer and formed from a transparent metal material; and electrode patterns formed from the same material as the second conductive pattern on the rest of the contact holes which expose the first and second pad portions.
Abstract:
A method for fabricating an LCD device including: providing first and second substrates; forming an active area having a source region, a drain region, and a channel region on the first substrate and a storage line having a first region and a second region; forming a first insulation film on the first substrate; forming a gate electrode and a gate line, and forming a pixel electrode overlapping with the first region of the storage line on the first substrate; forming a second insulation film on the first substrate; forming a contact hole exposing a portion of the source and drain regions by removing the first and second insulation films and exposing the pixel electrode by removing the second insulation film on the pixel electrode; and forming a source electrode electrically connected to the source region and a drain electrode electrically connected to the drain region through the contact hole.
Abstract:
An analog buffer for buffering an input voltage to an output line is provided. The analog buffer includes a constant current source and a comparator. The constant current source supplies a constant current to the output line, and the comparator compares a voltage charged on the output line with the input voltage to turn-off the constant current source if it is determined that the voltage charged on the output line corresponding to the input voltage is buffered to the output line.
Abstract:
A method for fabricating an LCD device includes providing first and second substrates and has a contact hole exposing a portion of the source and drain regions formed by removing a portion of the first and second insulation layers and removing the second insulation layer of the upper portion of the pixel electrode. The method also includes forming a third conductive layer on the first substrate; forming source and drain electrodes electrically connected to the source and drain regions through the contact hole by patterning the third conductive layer and exposing the second conductive layer of the upper portion of the pixel electrode; and forming a liquid crystal layer between the first and second substrates.
Abstract:
An active matrix organic electro luminescent display (ELD) device comprises a substrate, first and second active layers formed of polycrystalline silicon on the substrate, first source and drain regions and second source and drain regions, the first source and drain regions neighboring the first active layer and the second source and drain regions neighboring the second active layer, a gate insulating layer on the first and second active layers, first and second gate electrodes on the gate insulating layer, a first inter layer on the first and second gate electrodes, an anode electrode and a capacitor electrode on the first inter layer, a first passivation layer on the anode electrode and the capacitor electrode, a power line on the first passivation layer, first source and drain electrodes on the first passivation layer, the first source electrode being connected to the first source region and the first drain electrode being connected to the first drain region, second source and drain electrodes on the first passivation layer, the second source electrode being connected to the second source region, the power line and the capacitor electrode and the second drain electrode being connected to the second drain region and the anode electrode, and a second passivation layer on the first source and drain electrodes and the second source and drain electrodes, the second passivation layer having a bank that exposes the anode electrode.