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公开(公告)号:US12117704B2
公开(公告)日:2024-10-15
申请号:US18527464
申请日:2023-12-04
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Masatoshi Yokoyama , Shigeki Komori , Manabu Sato , Kenichi Okazaki , Shunpei Yamazaki
IPC: G02F1/1362 , G02F1/1333 , G02F1/1343
CPC classification number: G02F1/136227 , G02F1/133345 , G02F1/134309 , G02F1/13439 , G02F1/136277 , G02F1/134372 , G02F2202/02 , G02F2202/10
Abstract: To suppress a variation in characteristics of a transistor due to a released gas from an organic insulating film so that reliability of a display device is increased. The display device includes a transistor, an organic insulating film which is provided over the transistor in order to reduce unevenness due to the transistor, and a capacitor over the organic insulating film. An entire surface of the organic insulating film is not covered with components (a transparent conductive layer and an inorganic insulating film) of the capacitor, and a released gas from the organic insulating film can be released to the outside from exposed part of an upper surface of the organic insulating film.
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公开(公告)号:US20240319552A1
公开(公告)日:2024-09-26
申请号:US18580137
申请日:2022-12-23
Inventor: Yanping LIAO , Yingmeng MIAO , Dong LIU , Xibin SHAO , Peng JIANG , Dongchuan CHEN , Panhui ZHAO , Jiantao LIU , Tao YANG , Yingying QU
IPC: G02F1/1362 , G02F1/1368 , H01L27/12
CPC classification number: G02F1/13629 , G02F1/136213 , G02F1/136227 , G02F1/1368 , H01L27/124 , H01L27/1248 , H01L27/1255
Abstract: A display substrate, including: a base substrate; a plurality of data lines on the base substrate; a first insulating layer on a side of the plurality of data lines away from the base substrate; a plurality of gate lines on a side of the first insulating layer away from the plurality of data lines, where extension directions of the gate and data lines are intersected; a second insulating layer on a side of the plurality of gate lines away from the first insulating layer; and a first electrode on a side of the second insulating layer away from the plurality of gate lines, where at least a portion of an orthographic projection of the first electrode on the base substrate is within an region surrounded by orthographic projections of two adjacent data lines on the base substrate and orthographic projections of two adjacent gate lines on the base substrate.
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公开(公告)号:US20240310678A1
公开(公告)日:2024-09-19
申请号:US18674187
申请日:2024-05-24
Applicant: Japan Display Inc.
Inventor: Tomohide ONOGI , Yasuo SEGAWA
IPC: G02F1/1343 , G02F1/1333 , G02F1/1362 , G02F1/1368 , H01L27/12 , H01L29/786
CPC classification number: G02F1/134336 , G02F1/133345 , G02F1/134363 , G02F1/13439 , G02F1/136227 , G02F1/136286 , G02F1/1368 , H01L27/1222 , H01L27/1244 , H01L29/78669 , H01L29/78678 , G02F1/133357 , G02F1/134372 , G02F1/136295 , G02F2201/121 , G02F2201/123 , G02F2201/40 , G02F2202/103 , G02F2202/104
Abstract: A liquid crystal display device according to FFS technology is provided, which sufficiently provides a common electrode with common electric potential and improves an aperture ratio of pixels. A pixel electrode is formed of a first layer transparent electrode. A common electrode made of a second layer transparent electrode is formed above the pixel electrode interposing an insulation film between them. The common electrode in an upper layer is provided with a plurality of slits. The common electrode extends over all the pixels in a display region. An end of the common electrode is disposed on a periphery of the display region and connected with a peripheral common electric potential line that provides a common electric potential Vcom. There is provided neither an auxiliary common electrode line nor a pad electrode, both of which are provided in a liquid crystal display device according to a conventional art.
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公开(公告)号:US12092933B2
公开(公告)日:2024-09-17
申请号:US18370467
申请日:2023-09-20
Inventor: Wenqiang Yu , Chao Wang
IPC: G02F1/1362 , G02F1/1368
CPC classification number: G02F1/136209 , G02F1/136227 , G02F1/136286 , G02F1/1368
Abstract: The present disclosure provides a display panel. The display panel includes a data line; a transistor electrically connected to the data line, wherein the transistor includes a patterned active layer disposed in an area corresponding to the data line; and a shielding layer disposed between the patterned active layer and the data line.
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公开(公告)号:US12092932B2
公开(公告)日:2024-09-17
申请号:US18408683
申请日:2024-01-10
Applicant: Japan Display Inc.
Inventor: Yasushi Tomioka , Yosuke Hyodo , Hidehiro Sonoda , Noboru Kunimatsu
IPC: G02F1/1343 , G02F1/1333 , G02F1/1335 , G02F1/1337 , G02F1/1362 , G02F1/1368 , H01L27/12
CPC classification number: G02F1/134363 , G02F1/133345 , G02F1/133512 , G02F1/133514 , G02F1/133788 , G02F1/136227 , G02F1/1368 , H01L27/1218 , G02F2202/02
Abstract: In a liquid crystal display device, a common electrode is formed on an organic passivation film, an interlayer insulating film is formed on the common electrode, a pixel electrode with a slit is formed on the interlayer insulating film, and a through hole is formed in the organic passivation film and the interlayer insulating film, so that the pixel electrode is connected to a source electrode of a TFT through the through hole. Further, the taper angle around the upper base of the through hole is smaller than the taper angle around the lower base. Thus, the alignment film material can easily flow into the through hole when the diameter of the through hole is reduced to connect the pixel and source electrodes, preventing display defects such as uneven brightness due to the absence of the alignment film or due to the alignment film irregularity around the through hole.
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公开(公告)号:US20240304635A1
公开(公告)日:2024-09-12
申请号:US18670379
申请日:2024-05-21
Applicant: INNOLUX CORPORATION
Inventor: Cheng-Hsiung CHEN , Pei-Chieh CHEN , Chao-Hsiang WANG , Yi-Ching CHEN
IPC: H01L27/12 , G02F1/1362 , H01L29/786
CPC classification number: H01L27/124 , G02F1/136286 , H01L27/1225 , H01L29/7869 , G02F1/136227
Abstract: An electronic device includes a substrate, a signal line, a semiconductor, a first conductive portion and a second conductive portion. The signal line is disposed on the substrate. The semiconductor is disposed on the substrate and overlapped with the signal line. Wherein the semiconductor is electrically connected to the first conductive portion and the second conductive portion. Wherein in a top view, at least a portion of the signal line is disposed between the first conductive portion and the second conductive portion. Wherein the first conductive portion has a first curve edge, the second conductive portion has a second curve edge, and the first curve edge and the second curve edge are facing the at least a portion of the signal line and are convex toward the at least a portion of the signal line.
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公开(公告)号:US20240302703A1
公开(公告)日:2024-09-12
申请号:US18665692
申请日:2024-05-16
Inventor: Xiao WANG , Yan YAN , Yu MA , Weitao CHEN , Jiliang ZHANG
IPC: G02F1/1362 , G02F1/1333 , G06F3/041
CPC classification number: G02F1/13629 , G02F1/13338 , G02F1/136227 , G06F3/0412 , G06F3/04164
Abstract: An array substrate including: a base substrate; a data line on the base substrate and extending in a first direction; and a touch signal line on the base substrate, wherein an extending direction of the touch signal line is the same as an extending direction of the data line; an orthographic projection of the touch signal line on the base substrate at least partially overlaps an orthographic projection of the data line on the base substrate, which is within an orthographic projection of a gap between two touch electrode units adjacent in a second direction on the base substrate, and a size of the data line in the second direction is smaller than a size, in the second direction, of the gap between the two touch electrode units adjacent in the second direction, where the second direction is perpendicular to the first direction.
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公开(公告)号:US12085825B2
公开(公告)日:2024-09-10
申请号:US18350036
申请日:2023-07-11
Applicant: Japan Display Inc.
Inventor: Masateru Morimoto
IPC: G02F1/1362 , G02F1/1333 , G02F1/1339 , G02F1/1343 , G02F1/1368 , G06F3/041 , G06F3/044
CPC classification number: G02F1/136286 , G02F1/13338 , G02F1/13394 , G02F1/134363 , G02F1/136227 , G02F1/1368 , G06F3/0412 , G06F3/0443 , G02F1/13396 , G02F1/134318 , G02F2201/123
Abstract: According to one embodiment, a display device includes a first common electrode, a second common electrode spaced apart from the first common electrode, a first signal line overlapping the first common electrode and the second common electrode, a first metal line overlapping the first signal line and the first common electrode, and a second metal line overlapping the first signal line and the second common electrode and spaced apart from the first metal line. The first metal line includes an extension portion extending between the first common electrode and the second common electrode.
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公开(公告)号:US12078901B2
公开(公告)日:2024-09-03
申请号:US17600118
申请日:2021-09-07
Inventor: Maoxia Zhu , Hongyuan Xu , Woosung Son
IPC: G02F1/1368 , G02F1/1362
CPC classification number: G02F1/1368 , G02F1/136222 , G02F1/136227 , G02F1/136286
Abstract: The present disclosure provides a display panel and a display panel manufacturing method. The display panel includes a drive circuit layer, a color photoresist layer disposed on the drive circuit layer, a common electrode layer disposed on the color photoresist layer, and a pixel electrode layer disposed on the common electrode layer. The drive circuit layer is provided with a common wire, the common electrode layer is provided with a transparent electrode, the transparent electrode is electrically connected to the common wire, and the pixel electrode layer is provided with a plurality of pixel electrodes.
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公开(公告)号:US12072594B2
公开(公告)日:2024-08-27
申请号:US17607852
申请日:2021-09-08
Inventor: Zhilin Wu , Tao Ma , Dewei Song , Fei Ai
IPC: G02F1/1368 , G02F1/1333 , G02F1/1343 , G02F1/1362
CPC classification number: G02F1/136295 , G02F1/13338 , G02F1/1343 , G02F1/136209 , G02F1/136227 , G02F1/1368
Abstract: The present application discloses a display panel and an electrical terminal. The display panel includes: an underlay; an array driver layer located on the underlay and including a gate electrode layer and a source and drain electrode layer; a signal line including an adaptor portion located in the non-display region, wherein the adaptor portion includes a first wire section disposed in a same layer with the gate electrode layer, a second wire section disposed in a same layer with the source and drain electrode layer, and a bridge portion electrically connected to the first wire section and the second wire section; wherein the first wire section, the second wire section, and the bridge portion are disposed in different layers.
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