公开(公告)号：US20220374159A1

公开(公告)日：2022-11-24

申请号：US17860999

申请日：2022-07-08

Applicant: Micron Technology, Inc.

Inventor： John Paul Traver ,  Yun Li ,  Scheheresade Virani ,  Ning Zhao ,  Tom Victor Maria Geukens

IPC: G06F3/06

Abstract: Methods, systems, and devices for command batching for a memory sub-system are described. A memory sub-system can receive a plurality of commands for a plurality of transfer units of a memory sub-system and generate a list of the plurality of transfer units that includes pointers between the plurality of transfer units. The memory sub-system can store at least one pointer of the list in a shared memory that is shared by a plurality of cores, the at least one pointer indicating a next transfer unit of the list. The memory sub-system can send an indicator of a first transfer unit of the list based on storing the at least one pointer in the shared memory and retrieve the plurality of transfer units from the shared memory based on sending the indicator of the first transfer unit and storing the at least one pointer in the shared memory.

公开(公告)号：US20210278985A1

公开(公告)日：2021-09-09

申请号：US16809360

申请日：2020-03-04

Applicant: Micron Technology, Inc.

Inventor： John Paul Traver ,  Yun Li ,  Scheheresade Virani ,  Ning Zhao ,  Tom Victor Maria Geukens

IPC: G06F3/06

Abstract: Methods, systems, and devices for command batching for a memory sub-system are described. A memory sub-system can receive a plurality of commands for a plurality of transfer units of a memory sub-system and generate a list of the plurality of transfer units that includes pointers between the plurality of transfer units. The memory sub-system can store at least one pointer of the list in a shared memory that is shared by a plurality of cores, the at least one pointer indicating a next transfer unit of the list. The memory sub-system can send an indicator of a first transfer unit of the list based on storing the at least one pointer in the shared memory and retrieve the plurality of transfer units from the shared memory based on sending the indicator of the first transfer unit and storing the at least one pointer in the shared memory.

公开(公告)号：US20210271601A1

公开(公告)日：2021-09-02

申请号：US17322522

申请日：2021-05-17

Applicant: Micron Technology, Inc.

Inventor： Scheheresade Virani ,  Byron D. Harris

IPC: G06F12/0873 ,  G06F12/02 ,  G06F9/30 ,  G06F9/54 ,  G06F9/50

Abstract: A write command is received, for example, from a host system, which operates on a first logical address range. A read command is received that specifies a second logical address range that matches the first logical address range. Responsive to determining that a deallocate command has been received after the write command, zero-filled data is returned in response to the read command.

公开(公告)号：US11099785B2

公开(公告)日：2021-08-24

申请号：US16726124

申请日：2019-12-23

Applicant: Micron Technology, Inc.

Inventor： Ning Zhao ,  Yun Li ,  Scheheresade Virani ,  Zachary Andrew Pete Vogel

IPC: G06F3/06

Abstract: Methods, systems, and devices for linking access commands for a memory sub-system of a memory sub-system are described. A first write command that includes first data can be received. The first write command can be associated with a first identifier. An internal read command to retrieve data stored in the transfer unit of the memory sub-system can be issued based on receiving the first write command. A second write command that includes second data can be received. The second write command can be associated with a second identifier. The first and second identifiers can be linked based on receiving the second write command and an internal write command that includes the first data associated with the first write command and the second data associated with the second write command can be issued.